A high-resolution CMOS time-to-digital converter utilizing a Vernier delay line

By Piotr Dudek, S. Szczepański, J. Hatfield. IEEE Journal of Solid-State Circuits, 2000

730 citations recorded by the source corpus.

Subfields: Biomedical Engineering, Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/55b9e1304d237d6598a118bd60b2882712ec48a5

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In Biomedical Engineering

In Electrical and Electronic Engineering

Citations in the corpus

1.3 V 20 ps time-to-digital converter for frequency synthesis in 90-nm CMOS (2006, methodology): “T IME-TO-DIGITAL converters (TDCs) are being widely used for time interval measurements in space science [1], [2], high-energy physics [3]–[5], laser range finders [6] and test instrumentation [7].”
All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS (2004, background): “While other TDC architectures [8] can achieve the TDC resolution that is better than one inverter delay, they are quite complex and analog intensive and are not needed for Bluetooth and GSM applications in this CMOS process where ps is achieved.”
Review of methods for time interval measurements with picosecond resolution (2004, methodology): “When ASICs became generally available for custom design and their manufacturing became economically feasible, the trend in design of precise time converters shifted towards 'pure' digital conversion methods, based on the use of custom designed, integrated delay lines, and synchronous counters needed”
Current starved delay element with symmetric load (2006, methodology): “2001, Maymandi-Nejad and Sachdev 2003); (b) time-to-digital converters, (TDC), (Dudek et al. 2000); (c) frequency multipliers (Chain 2000); (d) poly-phase clock generators (Moon et al.”
A 9 b, 1.25 ps Resolution Coarse–Fine Time-to-Digital Converter in 90 nm CMOS that Amplifies a Time Residue (2008, methodology): “Due to the fact that the first method requires analog charge pump and the DLL activity adds more timing jitter to the output code [4], the second approach used in the digital PLL is preferred in future implementations.”