Major Bhadauria
CARN · 2009
A researcher in the Science corpus: 1 paper; trusts 4 researchers and is trusted by 0 researchers here, as inferred from the citation graph.
Whom Major Bhadauria trusts overall
Their strongest outbound trust, strongest first, inferred from their citations.
Who trusts Major Bhadauria overall
Papers from Major Bhadauria's perspective
Ordered by how strongly the researchers Major Bhadauria trusts endorse each paper. Same corpus, a different order for every researcher.
- Run-time power estimation in high performance microprocessors (ISLPED'01: Proceedings of the 2001 International Symposium on Low Power Electronics and Design (IEEE Cat. No.01TH8581))
- Accurate and efficient regression modeling for microarchitectural performance and power prediction (ASPLOS XII)
- The benefits of event: driven energy accounting in power-sensitive systems (ACM SIGOPS European Workshop)
- Energy-driven integrated hardware-software optimizations using SimplePower (Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat. No.RS00201))
- Regression Modeling Strategies: With Applications to Linear Models, Logistic Regression, and Survival Analysis
- A first-order superscalar processor model (Proceedings. 31st Annual International Symposium on Computer Architecture, 2004.)
- Regression Modeling Strategies (Technometrics)
- Efficiently exploring architectural design spaces via predictive modeling (ASPLOS XII)
- Energy-efficient processor design using multiple clock domains with dynamic voltage and frequency scaling (Proceedings Eighth International Symposium on High Performance Computer Architecture)
- Reducing power density through activity migration (Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03.)
Their papers
- Real time power estimation and thread scheduling via performance counters (2009) — 329 citations