A reconfigurable fabric for accelerating large-scale datacenter services
By Andrew Putnam, Adrian M. Caulfield, Eric S. Chung, Derek Chiou, Kypros Constantinides, J. Demme, Hadi Esmaeilzadeh, J. Fowers, Gopi Prashanth Gopal, J. Gray and 13 more. 2014
1,234 citations recorded by the source corpus.
Subfields: Computer Networks and Communications, Computer Vision and Pattern Recognition, Hardware and Architecture, ML Systems & Hardware
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Computer Networks and Communications
- Christina Delimitrou
- Christos Kozyrakis
- Abhishek Dhanotia
- Akshitha Sriraman
- Doug Burger
- David Lo
- Liqun Cheng
- Rama K. Govindaraju
In Computer Vision and Pattern Recognition
- Luc Van Gool
- Xiaogang Wang
- Dacheng Tao
- Yongming Shen
- Michael G. Rabbat
- Sparsh Mittal
- Jitendra Malik
- Ming-Hsuan Yang
In Hardware and Architecture
- Christos Kozyrakis
- Liqun Cheng
- David Lo
- Rama K. Govindaraju
- Rajeev Balasubramonian
- Parthasarathy Ranganathan
- Albert Cohen
- Christina Delimitrou
In ML Systems & Hardware
- Carole-Jean Wu
- Abhishek Dhanotia
- Akshitha Sriraman
- Bilge Acun
- Christos Kozyrakis
- Yu Gan
- Hadi Esmaeilzadeh
- Michael G. Rabbat
Citations in the corpus
- Sustainable AI: Environmental Implications, Challenges and Opportunities (2021, background): “…Reconfigurable Systems, and ASICs for AI: There is a wide variety of system hardware choices for AI from general-purpose processors (CPUs), general-purpose accelerators (GPUs or TPUs), field-programmable gate arrays (FPGAs) [81], to application-specific integrated circuit (ASIC), such as Eyeriss [82].”
- FP-DNN: An Automated Framework for Mapping Deep Neural Networks onto FPGAs with RTL-HLS Hybrid Templates (2017, methodology): “For the FPGA platform, we use Catapult [18] system with Altera Stratix-V GSMD5 FPGAs integrated.”
- Tensor Comprehensions: Framework-Agnostic High-Performance Machine Learning Abstractions (2018, background): “In the context of inference—deploying a trained model in production to drive decisions to improve user experience and revenue, based on individual preferences and history—the landscape is heavily shifting to custom hardware where the most serious efficiency gains lie, both in data centers [41, 65] a”
- A Survey and Evaluation of FPGA High-Level Synthesis Tools (2016, positive): “FPGA industry, such as Microsoft’s application of FPGAs in Bing search acceleration [4] and the forthcoming acquisition of Altera by Intel, further underscore the need for using FPGAs as computing platforms with high-level software-amenable design methodologies.”
- ASIC Clouds: Specializing the Datacenter (2016, methodology): “Catapult [11] pioneered the creation of FPGA Clouds.”
- Graviton: Trusted Execution Environments on GPUs (2018, background): “Recent trends such as the explosion in volume of data being collected and processed, declining yields from Moore’s Law [16], growing use of cloud computing, and applications, such as deep learning have fueled the widespread use of accelerators such as GPUs, FPGAs [37], and TPUs [20].”
- Can FPGAs Beat GPUs in Accelerating Next-Generation Deep Neural Networks? (2017, background): “Indeed, there are ongoing efforts from leading technology companies to incorporate FPGAs into datacenters (e.g., [12,13]).”
- An Open-Source Benchmark Suite for Microservices and Their Hardware-Software Implications for Cloud & Edge Systems (2019, background): “This includes analyzing the cycle breakdown in modern servers, examining whether big or small cores are preferable [25, 35, 41, 42, 46– 48], determining the pressure microservices put on instruction caches [37, 52], and exploring the potential they have for hardware acceleration [24, 27, 38, 49, 71]”
- SoftSKU: Optimizing Server Architectures for Microservice Diversity @Scale (2019, methodology): “Microsoft’s Catapult accelerates search ranking via FPGAs [93].”
- Accelerating Deep Convolutional Neural Networks Using Specialized Hardware (2015, background): “In the future, combining multiple FPGAs over a low-latency communication fabric offers further opportunity to train and evaluate models of unprecedented size and quality.”
- Seer: Leveraging Big Data to Navigate the Complexity of Performance Debugging in Cloud Microservices (2019, methodology): “Apart from software heterogeneity, datacenter hardware is also becoming increasingly heterogeneous as special-purpose architectures [20–22, 39, 55] and FPGAs are used to accelerate critical operations [19, 25, 40, 75].”
- From high-level deep neural models to FPGAs (2016, background): “With diminishing benefits from technology scaling [10] [11], the research community is increasingly turning to specialized accelerators for deep networks [12] [13] [14] [15] and other workloads [16] [17] [18] [19] [20] [21] [22].”
- Fused-layer CNN accelerators (2016, methodology): “As a result, there has been significant interest in developing and adapting hardware accelerators for CNNs [7] such as GPUs [3], FPGAs [13], [19], [10], [1], and ASICs [2].”
- Accelerating Homomorphic Evaluation on Reconfigurable Hardware (2015, methodology): “Since future data centers might be equipped with such accelerators, it makes sense to consider the Catapult architecture as a natural platform for evaluating functions with homomorphic encryption.”
- Maximizing CNN accelerator efficiency through resource partitioning (2016, background): “The combination of high performance and power efficiency on machine learning tasks is leading to the adoption of FPGAs in data center environments [20].”
- Azure Accelerated Networking: SmartNICs in the Public Cloud (2018, methodology): “Getting FPGAs into our data centers was not an easy effort — when project Catapult started this was just not a common use case for FPGAs, and the team had to work through numerous technical, logistical, and team structure issues.”
- Heracles: Improving resource efficiency at scale (2015, background): “optimizing various aspects of latency-critical workloads, including energy proportionality [53, 54, 47, 46, 34], networking performance [35, 8], and hardware-acceleration [41, 63, 72].”