Accelerating Deep Convolutional Neural Networks Using Specialized Hardware

By Kalin Ovtcharov, Olatunji Ruwase, Joo-Young Kim, J. Fowers, Karin Strauss, Eric S. Chung. 2015

343 citations recorded by the source corpus.

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Citations in the corpus

PerforatedCNNs: Acceleration through Elimination of Redundant Convolutions (2015, methodology): “Our experiments show that this method can reduce the evaluation time of modern CNN architectures proposed in the literature by a factor of 2× - 4× with a small decrease in accuracy.”
Accelerating Binarized Convolutional Neural Networks with Software-Programmable FPGAs (2017, background): “There are also efforts in the academic community on FPGA-based CNN accelerators [27, 19] as well as tools for generating them automatically [23, 26].”
Fathom: reference workloads for modern deep learning methods (2016, background): “The architecture community has begun to respond in force: A host of new hardware designs have been proposed [10], [12], [24], [39], and several are beginning to transition into production [30], [38].”
Hardware Trojan Attacks on Neural Networks (2018, background): “In recent years, various speciﬁc hardware acceleration techniques have been investigated to overcome the physical constraints of certain machine learning applications [12], [13].”
FPGA-Based Accelerators of Deep Learning Networks for Learning and Classification: A Review (2019, methodology): “[152] at Microsoft Research utilized Catapult hardware infrastructure, a dual-socket Xeon server equipped with Stratix-V GSMD5 FPGA, to design a specialized hardware for accel-”
A survey of deep learning techniques for autonomous driving (2019, background): “, 2017), Microsoft (Ovtcharov et al., 2015) and UCLA (Cong et al.”
Resiliency of Deep Neural Networks under Quantization (2015, methodology): “Although most of deep neural networks are implemented using GPUs (Graphics Processing Units) in these days, their implementation in hardware can give many beneﬁts in terms of power consumption and system size (Ovtcharov et al., 2015).”
Artificial intelligence applications in the development of autonomous vehicles: a survey (2020, unknown): “CPU E52699 Dual Xeon [80] 1320 321 4.”
Deep learning in bioinformatics (2016, background): “Currently, field programmable gate array based processors are under development, and neuromorphic chips modeled from the brain are greatly anticipated as promising technologies [212-214].”
Deep Learning on FPGAs: Past, Present, and Future (2016, methodology): “Ovtcharov et al. have reported a throughput of 134 images/second on the ImageNet 1K dataset [28], which amounts to roughly 3x the throughput of the next closest competitor, while operating at 25 W on a Stratix V D5 [30].”
CaffePresso: An optimized library for Deep Learning on embedded accelerator-based platforms (2016, background): “Unlike solutions (FPGAs [10, 14, 7], GPUs [13]) using abundant hardware resources, embedded solutions are severely constrained by the limited capacity of logic, on-chip memory and communication bandwidth.”
The cascading neural network: building the Internet of Smart Things (2017, background): “The potential of FPGAs as a hardware accelerator for deep neural networks has been well documented [31] but practical applications are still rather uncommon.”
YodaNN: An Architecture for Ultralow Power Binary-Weight CNN Acceleration (2016, background): “Several approaches leverage ﬁeld-programmable gate arrays (FPGAs) to maintain post-fabrication programmability, while providing signiﬁcant boost in terms of performance and energy efﬁ-ciency [14].”
FINN-R (2018, methodology): “We cover a recent and representative set of works here, roughly dividing them into three categories based on their basic architecture: (1) a single processing engine [5, 11, 12, 27, 28, 34, 41, 46, 68], usually in the form of a systolic array, which processes each layer sequentially; (2) a streaming”
A Survey on Distributed Machine Learning (2019, methodology): “As a competitor to Google’s TPUs, Azure supports accelerating ML applications through FPGAs [115].”
A Survey of Convolutional Neural Networks: Analysis, Applications, and Prospects (2020, background): “Through experiments, some researchers [194]–[197], [200]–[202] found that FPGA has a great advantage over CPU and GPU in power efficiency.”
Anomaly-based intrusion detection system through feature selection analysis and building hybrid efficient model (2017, methodology): “Microsoft [40] came up with an FPGA-based specialised hardware that aimed to accelerate deep convolutional neural networks so that they can be applied in data centres.”
A survey of FPGA-based accelerators for convolutional neural networks (2018, background): “Due to their several attractive features, FPGAs present as promising platforms for HW 1 acceleration of CNNs [1].”