Compute Caches

By Shaizeen Aga, Supreet Jeloka, Arun K. Subramaniyan, Satish Narayanasamy, David T. Blaauw, R. Das. International Symposium on High-Performance Computer Architecture, 2017

331 citations recorded by the source corpus.

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Processing Data Where It Makes Sense: Enabling In-Memory Computation (2019, background): “A number of Ambit-like bitwise operation substrates have been proposed in recent years, making use of emerging resistive memory technologies, e.g., phasechange memory (PCM) [17, 19, 176, 177, 178, 179], SRAM, or specialized computational DRAM.”
Memory devices and applications for in-memory computing (2020, background): “NaTuRe NaNoTecHNology This non-volatile accumulative behaviour, in spite of its nonlinear and stochastic nature, can be exploited in several applications, such as training deep neural networks, where the conductance values need to be incrementally modified.”
Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks (2018, methodology): “Compute cache [9] supported several simple operations (logical and copy).”
Ambit: In-Memory Accelerator for Bulk Bitwise Operations Using Commodity DRAM Technology (2017, positive): “Compute Cache [15] proposes a mechanism to perform bitwise operations inside on-chip SRAM caches.”
RowHammer: A Retrospective (2019, neutral): “, [13]–[15], [18], [22], [24], [34]–[36], [56], [63], [72], [77], [78], [80], [91], [92], [95], [96], [99], [101], [102], [111], [121]–[123], [151], [153], [154], [160], [161], [172], [178], [179], [182], [195], [198], [215]–[219], [221], [222], [228], [257], and [260]).”