Processing Data Where It Makes Sense: Enabling In-Memory Computation
By Onur Mutlu, Saugata Ghose, Juan Gómez-Luna, Rachata Ausavarungnirun. Microprocessors and microsystems, 2019
318 citations recorded by the source corpus.
Abstract Today’s systems are overwhelmingly designed to move data to computation. This design choice goes directly against at least three key trends in systems that cause performance, scalability and energy bottlenecks: (1) data access from memory is already a key bottleneck as applications become more data-intensive and memory bandwidth and energy do not scale well, (2) energy consumption is a key constraint in especially mobile and server systems, (3) data movement is very expensive in terms of bandwidth, energy and latency, much more so than computation. These trends are especially severely-felt in the data-intensive server and energy-constrained mobile systems of today. At the same time, conventional memory technology is facing many scaling challenges in terms of reliability, energy, and performance. As a result, memory system architects are open to organizing memory in different ways and making it more intelligent, at the expense of higher cost. The emergence of 3D-stacked memory plus logic as well as the adoption of error correcting codes inside DRAM chips, and the necessity for designing new solutions to serious reliability and security issues, such as the RowHammer phenomenon, are an evidence of this trend. In this work, we discuss some recent research that aims to practically enable computation close to data. After motivating trends in applications as well as technology, we discuss at least two promising directions for processing-in-memory (PIM): (1) performing massively-parallel bulk operations in memory by exploiting the analog operational properties of DRAM, with low-cost changes, (2) exploiting the logic layer in 3D-stacked memory technology to accelerate important data-intensive applications. In both approaches, we describe and tackle relevant cross-layer research, design, and adoption challenges in devices, architecture, systems, and programming models. Our focus is on the development of in-memory processing designs that can be adopted in real computing platforms at low cost.
Subfields: Computer Networks and Communications, Electrical and Electronic Engineering, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/4f17bd15a6f86730ac2207167ccf36ec9e6c2391
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Citations in the corpus
- RowHammer: A Retrospective (2019, unknown): “, [13]–[15], [18], [22], [24], [34]–[36], [56], [63], [72], [77], [78], [80], [91], [92], [95], [96], [99], [101], [102], [111], [121]–[123], [151], [153], [154], [160], [161], [172], [178], [179], [182], [195], [198], [215]–[219], [221], [222], [228], [257], and [260]).”
- Memory devices and applications for in-memory computing (2020, methodology): “To perform an in-place MVM, a vector bit slice is multiplied with a matrix bit slice, with 0(1) time complexity, and the partial products of these operations are combined outside of the crossbar arrays through a shift-and-add reduction network57.”