Low-swing on-chip signaling techniques: effectiveness and robustness
By Hui Zhang, G. Varghese, Jan M. Rabaey. IEEE Transactions on Very Large Scale Integration (vlsi) Systems, 2000
324 citations recorded by the source corpus.
Subfields: Biomedical Engineering, Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/de7b47de71ace25a89204f0c777a20726d07385a
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Biomedical Engineering
In Electrical and Electronic Engineering
- H. Philip Wong
- Luca Benini
- Davide Bertozzi
- Bipul Chandra Paul
- Daniele Ielmini
- Shimeng Yu
- Ximeng Guan
- Giovanni De Micheli
Citations in the corpus
- Fully Integrated Graphene and Carbon Nanotube Interconnects for Gigahertz High-Speed CMOS Electronics (2010, methodology): “Part of the work in this paper was performed at the Stanford Nanofabrication Facility.”
- Networks on Chip (2003, unknown): “Recently many researchers have made proposal of packet switched on-chip networks for connecting cores [1-6], [10].”
- Xpipes: a network-on-chip architecture for gigascale systems-on-chip (2004, background): “This leads to lower communication failure probabilities, thus enabling the use of low swing signalling techniques [16], and to the capability of exploiting performance optimisation techniques such as wavefront pipelining [17].”