Dynamic thermal management for high-performance microprocessors
By David M. Brooks, Margaret Martonosi. Proceedings HPCA Seventh International Symposium on High-Performance Computer Architecture, 2001
777 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/c0b0f15a0d328e11d081471e0ac765211643bffc
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Electrical and Electronic Engineering
- Margaret Martonosi
- Kevin Skadron
- Carole-Jean Wu
- Mircea R. Stan
- Karthik Sankaranarayanan
- James Mc Donald
- Sivakumar Velusamy
- Wei Huang
In Hardware and Architecture
- Margaret Martonosi
- Kevin Skadron
- Mircea R. Stan
- Karthik Sankaranarayanan
- Wei Huang
- Sivakumar Velusamy
- Carole-Jean Wu
- James Mc Donald
Citations in the corpus
- Managing energy and server resources in hosting centers (2001, background): “, cooling failure) in a manner similar to dynamic thermal management [13] within an individual server.”
- Power and energy management for server systems (2004, methodology): “Once an emergency is detected, they propose using me chanisms such as frequency scaling, DVS, and decode throttling to limit short-term energy consumpti on [5].”
- Techniques for Multicore Thermal Management: Classification and New Exploration (2006, background): “One of the most basic forms of dynamic thermal management is known as global clock gating [5] or “stop-go”.”
- JouleSort: a balanced energy-efficiency benchmark (2007, neutral): “studies have been devoted to algorithms for dynamically exploiting different power states in processors [4, 14, 36], memory [10], and disks [8] in order to promote energy efficiency.”
- Improving smartphone user experience by balancing performance and energy with probabilistic QoS guarantee (2016, background): “From this perspective, it is imperative to ensure user satisfaction even at the cost of additional power; however, due to finite energy capacity, it is not typically optimal for mobile platforms to sustain high performance states, and as this paper will demonstrate, providing guarantees on QoS…”
- Dynamo: Facebook's Data Center-Wide Power Management System (2016, background): “A data center typically spans four rooms, called suites, where racks of servers are arranged in rows.”
- Thermal Modeling, Analysis, and Management in VLSI Circuits: Principles and Methods (2006, methodology): “The trigger mechanism used to cool the microprocessor’s temperature with DTM has been described in [78] by using Wattch [79].”
- Reducing power density through activity migration (2003, neutral): “There are many techniques that provide power-performance tradeoffs such as dynamic voltage scaling (DVS), dynamic cache configuration modification, fetch/decode throttling, or speculation control [3].”
- No "power" struggles: coordinated multi-level power management for the data center (2008, methodology): “Second, using our unified architecture as the base, we perform a detailed quantitative sensitivity analysis and draw conclusions about the impact of different architectures, implementations, workloads, and system design choices.”
- Server-Level Power Control (2007, methodology): “[17] use ad-hoc control to limit processor temperature so cheaper heat-sinks can be used.”
- Balance of power: dynamic thermal management for Internet data centers (2005, background): “Researchers are investigating more sophisticated DTM approaches to degrade gracefully by modulating power- intensive chip functions [5] [7].”
- Temperature-aware microarchitecture: Modeling and implementation (2004, methodology): “It has recently been proposed as one solution for thermal management [Brooks and Martonosi 2001; Huang et al. 2000], and is used for this purpose in Transmeta s Crusoe processors [Fleischmann 2000].”
- Temperature and supply Voltage aware performance and power modeling at microarchitecture level (2005, background): “Ref. [ 15 ] models the on-chip temperature as the average power consumption within a fixed time window.”
- Informed Microarchitecture Design Space Exploration Using Workload Dynamics (2007, positive): “For example, in light of increasing processor power and thermal dissipation, instead of designing packaging that can meet the cooling capacity for worst-case scenarios, architects can examine how the workload thermal dynamics behave across different architecture configurations and deploy appropriate”
- Temperature-aware microarchitecture (2003, methodology): “Brooks and Martonosi [4] compared several stand-alone techniques for thermal management: frequency scaling, voltage and frequency scaling, fetch toggling (halting fetch for some period of time, which is similar to the Pentium 4 s global clock gating), decode throttling (varying the number of i”
- Heat-and-run: leveraging SMT and CMP to manage power density through the operating system (2004, methodology): “Other power-density techniques have been applied to supers lar processors, such as dynamic frequency scaling (DFS) a dynamic voltage scaling (DVS) [1, 8, 9].”