Neutron soft error rate measurements in a 90-nm CMOS process and scaling trends in SRAM from 0.25-/spl mu/m to 90-nm generation
By P. Hazucha, T. Karnik, J. Maiz, S. Walstra, B. Bloechel, J. Tschanz, G. Dermer, S. Hareland, P. Armstrong, Shekhar Y. Borkar. IEEE International Electron Devices Meeting 2003, 2003
180 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/bea8741e88e162384aa2b5885d49959203be59b4
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In Electrical and Electronic Engineering
Citations in the corpus
- Characterization of soft errors caused by single event upsets in CMOS processes (2004, methodology): “Roche et al. measured an approximately constant alpha SER in 0.25 m and 130nm SRAM [87].”
- Multiple Cell Upsets as the Key Contribution to the Total SER of 65 nm CMOS SRAMs and Its Dependence on Well Engineering (2007, result): “The total SER (alpha + neutron) in 65 nm is reduced by 5%. This trend and order of magnitude for the slight decrease is in agreement with other works published in the literature [ 12 ], [13].”
- Radiation-Induced Soft Error Rates of Advanced CMOS Bulk Devices (2006, methodology): “The alpha particle SER models are calibrated by testing latch arrays [7, 8].”