Bit error rate in NAND Flash memories
By Neal R. Mielke, Todd A. Marquart, Ning Wu, J. Kessenich, Hanmant Belgal, Eric Schares, Falgun Trivedi, Evan Goodness, L. Nevill. IEEE International Reliability Physics Symposium, 2008
395 citations recorded by the source corpus.
Subfields: Computer Networks and Communications, Electrical and Electronic Engineering, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/bd624db25340a435b121ba5cc9c9ca60437580f1
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In Computer Networks and Communications
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Citations in the corpus
- Data retention in MLC NAND flash memory: Characterization, optimization, and recovery (2015, background): “, retention noise [2][3][4][5][6], read disturbance noise [5], cellto-cell program interference noise [2][7][8], and program/erase (P/E) cycling noise [2][9].”
- Error Characterization, Mitigation, and Recovery in Flash-Memory-Based Solid-State Drives (2017, methodology): “Error characterization studies [14, 15, 56, 116, 126, 153] have found that, due to NAND flash wearout, the probability of raw bit errors increases as more program/erase (P/E) cycles (i.e., write accesses , or writes ) are performed to the drive.”
- PebblesDB: Building Key-Value Stores using Fragmented Log-Structured Merge Trees (2017, background): “High write amplification increases the load on storage devices such as SSDs, which have limited write cycles before the bit error rate becomes unacceptable [3, 26, 39].”
- SSD Failures in Datacenters: What? When? and Why? (2016, background): “those seen in the Facebook study [24], the UBER observed in our dataset (10 to 10) is at least an order of magnitude higher than the target rate (10) [26].”
- Present and Future Non-Volatile Memories for Space (2010, background): “Reliability of floating gate devices is a complex and multifarious problem [39], [40].”
- Error patterns in MLC NAND flash memory: Measurement, characterization, and analysis (2012, background): “[13] characterizes the error results for 72nm flash memory.”
- Radiation Effects in Flash Memories (2013, background): “The reliability of floating gate devices is critical because of the large electric fields used during program and erase operations [14], [15].”
- Approximate storage in solid-state memories (2013, methodology): “We choose a conservative baseline raw bit error rate (RBER) of 10−8, which comports with RBERs observed in Flash memory today [4, 25].”