Global (interconnect) warming

By Kaustav Banerjee, A. Mehrotra. 2001

195 citations recorded by the source corpus.

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

Power reduction techniques for microprocessor systems (2005, background): “The wires in a chip often use materials with poor thermal conductivity [Banerjee and Mehrotra 2001].”
Scaling analysis of multilevel interconnect temperatures for high-performance ICs (2005, background): “ACCURATE estimates of multilevel interconnect temperatures are necessary for interconnect performance and reliability assessment in high-performance very large-scale integrated (VLSI) circuits [1]–[3].”
On the Applicability of Single-Walled Carbon Nanotubes as VLSI Interconnects (2009, background): “This adversely affects interconnect reliability, since EM lifetime of Cu depends quadratically on J and exponentially on metal temperature (Tm ) [83].”
HotSpot: a compact thermal modeling methodology for early-stage VLSI design (2006, background): “Most existing interconnect self-heating power and thermal models are either based on analysis of only a few wires [23] or need full-chip detailed layout information that is not available during early design stages [24].”