Algorithms and data structures for flash memories
By E. Gal, Sivan Toledo. CSUR, 2005
657 citations recorded by the source corpus.
Subfields: Artificial Intelligence, Computer Networks and Communications, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/94aaabc634c42bbcccaee9314218e710cfb01fe4
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Artificial Intelligence
- Roy H. Campbell
- Moinuddin K. Qureshi
- Sudipta Sengupta
- Hong Jiang
- Dan Feng
- Bongki Moon
- Onur Mutlu
- Vijayalakshmi Srinivasan
In Computer Networks and Communications
In Hardware and Architecture
- Onur Mutlu
- Saugata Ghose
- Xiaodong Zhang
- Feng Chen
- Yixin Luo
- Yu Cai
- Erich F. Haratsch
- Moinuddin K. Qureshi
Citations in the corpus
- SCORE (2018, background): “The key functions of the FTL include address mapping, garbage collection, and wear leveling [20].”
- Error Characterization, Mitigation, and Recovery in Flash-Memory-Based Solid-State Drives (2017, methodology): “One simple approach is to select the block in the free list with the lowest number of P/E cycles to minimize the variance of the wearout amount across blocks, though many algorithms have been developed for wear leveling [34, 54].”
- Performance impact and interplay of SSD parallelism through advanced commands, allocation strategy and data granularity (2011, background): “The top module is responsible for buffer organization and scheduling requests; In the middle module, the FTL sub-module simulates many state-of-the-art FTL schemes including pure page-FTL [43][44], pure block-FTL [43][44], DFTL [12] and FAST [15], and the allocation sub-module provides the choice of”
- Consistent and Durable Data Structures for Non-Volatile Byte-Addressable Memory (2011, background): “Recently there have been many efforts [21] to optimize data structures for flash memory based systems.”
- Understanding intrinsic characteristics and system implications of flash memory based solid state drives (2009, background): “Our study reveals several unanticipated aspects in the performance dynamics of SSD technology that must be addressed by system designers and data-intensive application users in order to e.ectively place it in the storage hierarchy.”
- Enhancing lifetime and security of PCM-based Main Memory with Start-Gap Wear Leveling (2009, background): “1 Related Work in Wear Leveling Wear leveling has been studied extensively for Flash based storage structures [7][12][2][3][6].”
- Design of flash-based DBMS: an in-page logging approach (2007, background): “Due to no mechanical latency of flash memory, however, small random writes can be processed efficiently as long as costly erase operations are not involved [8].”
- Error patterns in MLC NAND flash memory: Measurement, characterization, and analysis (2012, background): “Assuming typical write amplification of 2 times (due to additional writes caused by garbage collection and wear leveling [4]) and ideal wear-leveling, current MLC flash based storage will use up all its reliable P/E cycles (e.”
- ChunkStash: Speeding Up Inline Storage Deduplication Using Flash Memory (2010, methodology): “FTL uses various wear leveling techniques to even out the erase counts of different blocks in the flash memory to increase its overall longevity [20].”
- CAFTL: A Content-Aware Flash Translation Layer Enhancing the Lifespan of Flash Memory based Solid State Drives (2011, background): “Most previous research work [21] focuses on the third factor, garbage collection and wear-leveling policies.”