Analog VLSI: Circuits and Principles
By Shih-Chii Liu, Tobi Delbruck, J. Kramer, G. Indiveri, Rodney J. Douglas. 2002
314 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/86379067778f25ea63c7e31ff7589e7c67d75576
How researchers see this paper
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In Electrical and Electronic Engineering
- Giacomo Indiveri
- Shih-Chii Liu
- Fabio Stefanini
- B. Linares‐Barranco
- Tobi Delbruck
- T. Serrano‐Gotarredona
- Hesham Mostafa
- Chiara Bartolozzi
Citations in the corpus
- A reconfigurable on-line learning spiking neuromorphic processor comprising 256 neurons and 128K synapses (2015, methodology): “…of detailed neural models, using mixed signal analog-digital circuits to reproduce faithfully neural and synaptic dynamics, in a basic research effort to understand the principles of neural computation in physical hardware systems (Douglas et al., 1995; Liu et al., 2002; Chicca et al., 2014).”
- Synaptic Dynamics in Analog VLSI (2007, background): “The function of translating “fast” presynaptic pulses into long-lasting postsynaptic currents, with elaborate temporal dynamics, can be efficiently mapped onto silicon using subthreshold (or weak-inversion) analog VLSI (aVLSI) circuits (Liu et al., 2002).”
- A 300 nW, 15 ppm/$^{\circ}$C, 20 ppm/V CMOS Voltage Reference Circuit Consisting of Subthreshold MOSFETs (2009, background): “The gate-source voltages of – in the bias-voltage subcircuit and in the current source subcircuit form a closed loop [15], [16].”
- Neuromorphic Silicon Neuron Circuits (2011, methodology): “A detailed description of this circuit is provided in Liu et al. (2002).”
- A VLSI array of low-power spiking neurons and bistable synapses with spike-timing dependent plasticity (2006, methodology): “standard CMOS technology [29], but for spike-based learning rules they would require a control circuit (and, thus, a large area) per synapse.”
- Neuromorphic Electronic Circuits for Building Autonomous Cognitive Systems (2014, background): “…can be integrated to form multi-chip spiking recurrent and WinnerTake-All neural networks, which in turn have been proposed as neural models for explaining pattern recognition [24], [25], working memory [9], [26], decision making [27], [28] and state-dependent computation [29], [30] in the brain.”
- Integration of nanoscale memristor synapses in neuromorphic computing architectures (2013, methodology): “One elegant solution to this problem is to use current-mode design techniques [59] and log-domain subthreshold circuits [60, 61].”
- Memory and Information Processing in Neuromorphic Systems (2015, methodology): “Therefore, sub-threshold analog circuits require far fewer transistors than digital for emulating certain properties of neural systems.”