A reconfigurable on-line learning spiking neuromorphic processor comprising 256 neurons and 128K synapses
By Ning Qiao, Hesham Mostafa, Federico Corradi, Marc Osswald, Fabio Stefanini, Dora Sumislawska, Giacomo Indiveri. Frontiers in Neuroscience, 2015
662 citations recorded by the source corpus.
Implementing compact, low-power artificial neural processing systems with real-time on-line learning abilities is still an open challenge. In this paper we present a full-custom mixed-signal VLSI device with neuromorphic learning circuits that emulate the biophysics of real spiking neurons and dynamic synapses for exploring the properties of computational neuroscience models and for building brain-inspired computing systems. The proposed architecture allows the on-chip configuration of a wide range of network connectivities, including recurrent and deep networks, with short-term and long-term plasticity. The device comprises 128 K analog synapse and 256 neuron circuits with biologically plausible dynamics and bi-stable spike-based plasticity mechanisms that endow it with on-line learning abilities. In addition to the analog circuits, the device comprises also asynchronous digital logic circuits for setting different synapse and neuron properties as well as different network configurations. This prototype device, fabricated using a 180 nm 1P6M CMOS process, occupies an area of 51.4 mm2, and consumes approximately 4 mW for typical experiments, for example involving attractor networks. Here we describe the details of the overall architecture and of the individual circuits and present experimental results that showcase its potential. By supporting a wide range of cortical-like computational modules comprising plasticity mechanisms, this device will enable the realization of intelligent autonomous systems with on-line learning capabilities.
View Paper: https://www.semanticscholar.org/paper/1d7a1c2c01fb47460c5a29ba15b08e3192202c53
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
- Hesham Mostafa
- Mike Davies
- Shih-Chii Liu
- Guillaume Bellec
- Garrick Orchard
- Robert A. Legenstein
- Michael Pfeiffer
- Andreas Wild
Citations in the corpus
- Long short-term memory and Learning-to-learn in networks of spiking neurons (2018, background): “The superior computing and learning capabilities of LSNNs suggest that they are also of interest for implementation in spike-based neuromorphic chips such as Brainscales [9], SpiNNaker [10], True North [2], chips from ETH Zürich [11], and Loihi [12].”
- A 0.086-mm$^2$ 12.7-pJ/SOP 64k-Synapse 256-Neuron Online-Learning Digital Spiking Neuromorphic Processor in 28-nm CMOS (2018, background): “The first design approach for neuromorphic devices appeared in the late 1980s and exploited direct emulation of the brain ion channels dynamics with the MOS transistor operated in subthreshold regime [22], an approach still popular today for SNNs (e.g., ROLLS [23] and DYNAPs [24]).”
- Memory and Information Processing in Neuromorphic Systems (2015, background): “, hundreds of milliseconds), for longterm stability and storage of the weights (see [134] for a thorough description and characterization of these circuits).”
- Organic electronics for neuromorphic computing (2018, background): “On the one hand, asynchronous spiking neural networks based on silicon neurons and synapses, consisting of multi-element circuits 4 , have been the focus of attention in emulating large-scale biological neural networks, as well as in event-driven computing 5 .”
- Loihi: A Neuromorphic Manycore Processor with On-Chip Learning (2018, unknown): “Some small-scale neuromorphic chips with analog synapse and neuron circuits have prototyped synaptic plasticity using spike traces, for example, 8 but these prior chips have orders of magnitude lower network capacity compared to Loihi, as well as far less programmability.”
- Supervised Learning Based on Temporal Coding in Spiking Neural Networks (2016, background): “Compared to rate-based networks, the networks we present can be implemented more efficiently on neuromorphic architectures where power consumption decreases as spike rates are reduced [7, 8, 9].”
- Advancing Neuromorphic Computing With Loihi: A Survey of Results and Outlook (2021, background): “This has led to a long list of exotic chips over the past three decades, beginning with Mead and Mahowald’s silicon retina [8] through more recent chips impressively integrating up to 65 536 analog neurons and boards with one million neurons [9] and even some with synaptic plasticity [10].”