Active Hardware Metering for Intellectual Property Protection and Security

By Y. Alkabani, Farinaz Koushanfar. USENIX Security Symposium, 2007

368 citations recorded by the source corpus.

View Paper: https://www.semanticscholar.org/paper/862697a5de3fdca693efc39d0e45e773e7b87965

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Citations in the corpus

Security analysis of integrated circuit camouflaging (2013, background): “Furthermore, controllers are usually tiny (<1%) [21, 23].”
Security analysis of logic obfuscation (2012, background): “In sequential logic obfuscation, additional logic (black) states are introduced in the state transition graph [7,8].”
A Survey of Hardware Trojan Taxonomy and Detection (2010, unknown): “However, this approach the Trojan.”
Lightweight secure PUFs (2008, unknown): “Statistical analysis of the new structure and its comparison with existing PUFs indicates a signi.cantly lower predictability, and higher resilience against circuit faults, reverse engineering and other security attacks.”
EPIC: Ending Piracy of Integrated Circuits (2008, background): “Introduction As LSI Logic quit semiconductor manufacturing in 2005 and Texas Instruments chose not to develop sub-45nm fabrication in-house, they and their former clients partnered with major foundries to outsource production.”
Fault Analysis-Based Logic Encryption (2015, methodology): “In sequential logic encryption, additional logic (black) states are introduced in the state transition graph [3], [11], [12].”
Provably-Secure Logic Locking: From Theory To Practice (2017, background): “To address these issues most eectively at the hardware level [32], a number of hardware design-for-trust (DfTr) techniques such as IC metering [1, 22, 23], watermarking [17, 18, 21, 31], IC camouaging [3, 4, 27, 28, 35, 46, 51, 56, 62], split manufacturing [14, 16], and logic locking [34, 36, 38, ”
Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain (2014, methodology): “Hardware metering attempts to uniquely tag each chip produced from a certain design by active or passive methods to facilitate chip tracing [20], [21].”
A Primer on Hardware Security: Models, Methods, and Metrics (2014, unknown): “Section VII concludes the paper.”