Security analysis of integrated circuit camouflaging
By Jeyavijayan Rajendran, Michael Sam, Ozgur Sinanoglu, Ramesh Karri. Conference on Computer and Communications Security, 2013
392 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/0fbc6fc05d18f5301f3bde09509a5ec2f96b0a9f
How researchers see this paper
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In Electrical and Electronic Engineering
- Ramesh Karri
- M. Tehranipoor
- Ozgur Sinanoglu
- Jeyavijayan Rajendran
- Farinaz Koushanfar
- Hassan Salmani
- Swarup Bhunia
- Muhammad Yasin
In Hardware and Architecture
- Ramesh Karri
- M. Tehranipoor
- Ozgur Sinanoglu
- Jeyavijayan Rajendran
- Farinaz Koushanfar
- Muhammad Yasin
- Hassan Salmani
- Swarup Bhunia
Citations in the corpus
- Benchmarking of Hardware Trojans and Maliciously Affected Circuits (2017, background): “On the other hand, in order to make Trojan insertion difficult, researchers have proposed techniques such as logic obfuscation to lock the functionality of the IC [29–31], functional filler cell insertion [32] for layout protection, IC camouflaging [33] and split-manufacturing [34, 35] to prevent re”
- Provably-Secure Logic Locking: From Theory To Practice (2017, background): “To address these issues most eectively at the hardware level [32], a number of hardware design-for-trust (DfTr) techniques such as IC metering [1, 22, 23], watermarking [17, 18, 21, 31], IC camouaging [3, 4, 27, 28, 35, 46, 51, 56, 62], split manufacturing [14, 16], and logic locking [34, 36, 38, ”
- A Primer on Hardware Security: Models, Methods, and Metrics (2014, background): “Metrics for camouflaging include: 1) the number of brute force attempts required to identify the functionality of camouflaged gates [72], [73]; and 2) the Hamming distance between the outputs of the original netlist and the netlist in which the functionality of camouflaged gates is assigned by the a”
- SARLock: SAT attack resistant logic locking (2016, background): “Countermeasures such as IC camouflaging [3], split manufacturing [4], and IC metering [5] have been developed to thwart these attacks.”
- Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain (2014, methodology): “In an effort to hamper an attacker from reverse engineering a chip, IC camouflaging has been proposed by introducing dummy contacts into the layout [81].”
- AppSAT: Approximately deobfuscating integrated circuits (2017, methodology): “A via with a middle gap can deceivingly appear to be connected during reverseengineering serving as a dummy connection [9].”