Threshold voltage distribution in MLC NAND flash memory: Characterization, analysis, and modeling
By Yu Cai, Erich F. Haratsch, Onur Mutlu, K. Mai. Design, Automation and Test in Europe, 2013
304 citations recorded by the source corpus.
Subfields: Computational Theory and Mathematics, Computer Networks and Communications, Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/861a627f3b630b48b9ecdf26ffa99aa9a0a2c77c
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In Computational Theory and Mathematics
In Computer Networks and Communications
In Electrical and Electronic Engineering
Citations in the corpus
- Data retention in MLC NAND flash memory: Characterization, optimization, and recovery (2015, methodology): “In addition, MLC technology reduces the size of the threshold voltage window [9], i.”
- Memory scaling: A systems architecture perspective (2013, background): “First, there is increasing difficulty scaling the well-established chargebased memory technologies, such as DRAM [48, 4, 38, 1] and flash memory [35, 47, 9, 10, 12], to smaller technology nodes.”
- RowHammer: A Retrospective (2019, background): “[164], [173], [174], [176], [181], data retention is becoming significantly more difficult in both technologies [42]–[44], [46], [50], [52], [53], [59], [112], [114]–[116], [158], [159],”