High- /Metal-Gate Stack and Its MOSFET Characteristics

By R. Chau, Supriyo Datta, M. Doczy, B. Doyle, J. Kavalieros, M. Metz. 2004

215 citations recorded by the source corpus.

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Carrier transport in HfO/sub 2//metal gate MOSFETs: physical insight into critical parameters (2006, methodology): “Indeed, the soft-phonon-limited mobility is expected to decrease with increasing field, and may be effective at a higher field, as observed experimentally in [12] in devices with”
A 45nm Logic Technology with High-k+Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm Dry Patterning, and 100% Pb-free Packaging (2007, unknown): “High performance high-k + metal gate transistors have been demonstrated using band edge workfunction metal gate electrodes [5].”
Hot-Carrier acceleration factors for low power management in DC-AC stressed 40nm NMOS node at high temperature (2009, unknown): “The use of high performances devices with low threshold voltage (VT ) required to move to metal gates, high-K dielectrics deposited on Silicon On Insulator (SOI) structures [6] and Multi-Gate Field Effect Transistors (MUGFETs) [7] in order to improve transistor switching speed and to reduce power co”
Statistical Threshold-Voltage Variability in Scaled Decananometer Bulk HKMG MOSFETs: A Full-Scale 3-D Simulation Scaling Study (2011, unknown): “without compromising gate leakage [3].”