Access devices for 3D crosspoint memorya)

By Geoffrey W. Burr, Rohit S. Shenoy, K. Virwani, Pritish Narayanan, A. Padilla, Bülent N. Kurdi, Hyunsang Hwang. 2014

329 citations recorded by the source corpus.

The emergence of new nonvolatile memory (NVM) technologies—such as phase change memory, resistive, and spin-torque-transfer magnetic RAM—has been motivated by exciting applications such as storage class memory, embedded nonvolatile memory, enhanced solid-state disks, and neuromorphic computing. Many of these applications call for such NVM devices to be packed densely in vast “crosspoint” arrays offering many gigabytes if not terabytes of solid-state storage. In such arrays, access to any small subset of the array for accurate reading or low-power writing requires a strong nonlinearity in the IV characteristics, so that the currents passing through the selecteddevices greatly exceed the residual leakage through the nonselecteddevices. This nonlinearity can either be included explicitly, by adding a discrete access device at each crosspoint, or implicitly with an NVM device which also exhibits a highly nonlinear IV characteristic. This article reviews progress made toward implementing such access device functionality, focusing on the need to stack such crosspoint arrays vertically above the surface of a silicon wafer for increased effective areal density. The authors start with a brief overview of circuit-level considerations for crosspoint memory arrays, and discuss the role of the access device in minimizing leakage through the many nonselected cells, while delivering the right voltages and currents to the selected cell. The authors then summarize the criteria that an access device must fulfill in order to enable crosspoint memory. The authors review current research on various discrete access device options, ranging from conventional silicon-based semiconductor devices, to oxide semiconductors, threshold switch devices, oxide tunnel barriers, and devices based on mixed-ionic-electronic-conduction. Finally, the authors discuss various approaches for self-selected nonvolatile memories based on Resistive RAM.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/3a2beddf5460a03641d58bd97b35772d0979534d

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In Electrical and Electronic Engineering

Citations in the corpus

Recent Progress in Phase-Change Memory Technology (2016, background): “higher effective data density (and thus lower cost) through 3D memory arrays with multiple layers of PCM cells [111].”
Memory devices and applications for in-memory computing (2020, background): “NaTuRe NaNoTecHNology This non-volatile accumulative behaviour, in spite of its nonlinear and stochastic nature, can be exploited in several applications, such as training deep neural networks, where the conductance values need to be incrementally modified.”
A non-volatile organic electrochemical device as a low-voltage artificial synapse for neuromorphic computing. (2017, unknown): “Existing access devices currently require at least a few hundred millivolts for operating as they are designed to work with higher voltage memory elements than ENODe 37 .”
Emerging Memory Technologies: Recent Trends and Prospects (2016, methodology): “Selector Device for Cross-Point Array Next we will survey the two-terminal selector devices reported in [29].”
Phase-Change Memory—Towards a Storage-Class Memory (2017, background): “A selector device is preferably a two-terminal switch, which behaves similar to a diode with large drive current in the ON-state and low OFF-state current below a certain threshold voltage [35].”
Resistive switching memories based on metal oxides: mechanisms, reliability and scaling (2016, background): “Select devices include heterojunction metal-oxide diodes [14], threshold switches based on metal oxides [136–138] or chalcogenide glasses [139, 140], mixed ion-electron conduction (MIEC) devices [141], multilayer tunnel junctions [142], threshold vacuum switches [143], and others [144].”