Minimizing Computation in Convolutional Neural Networks

By Jason Cong, Bing-Yu Xiao. International Conference on Artificial Neural Networks, 2014

377 citations recorded by the source corpus.

Subfields: Artificial Intelligence, Computer Vision and Pattern Recognition, Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/f5f1beada9e269b2a7faed8dfe936919ac0c2397

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Artificial Intelligence

In Computer Vision and Pattern Recognition

In Electrical and Electronic Engineering

Citations in the corpus

Eyeriss: A Spatial Architecture for Energy-Efficient Dataflow for Convolutional Neural Networks (2016, background): “Convolutions account for over 90% of the CNN operations and dominates runtime [10].”
Deep Convolutional Neural Network for Inverse Problems in Imaging (2016, background): “More specifically, for an N × N input, K × K filters, R filters per layer, and L layers, the cost of evaluating the CNN grows like O(N2 K 2 R2 L) [58].”
Fast Algorithms for Convolutional Neural Networks (2015, methodology): “Strassen recursions can be performed before the fast convolution algorithms, as was done in [3] with direct convolution.”
SCNN: An accelerator for compressed-sparse convolutional neural networks (2017, background): “In such cases, the overheads of SCNN’s structures such as the crossbar and distributed accumulation RAMs overshadow any benefits from fewer arithmetic operations and data movement.”
FPGA-Based Accelerators of Deep Learning Networks for Learning and Classification: A Review (2019, background): “CONV layers are dominant in CNN algorithms since they often constitute more than 90% of the total CNN operations [28], [29], [49], [74], [77], [78].”
Deep-Learning Schemes for Full-Wave Nonlinear Inverse Scattering Problems (2019, background): “Specifically, if there are Qi input feature maps, Qo output feature maps, and the feature map size and convolution kernel size are M × M and Kf × Kf (Kf = 3 in this paper), respectively, the computational workload in the convolution layer is in the order of O(M(2)K(2) fQiQo) [35].”
A Configurable Cloud-Scale DNN Processor for Real-Time AI (2018, background): “One such example is Deep Compression [41] but there are also others [56]–[61].”
SAR Automatic Target Recognition Based on Multiview Deep Learning Framework (2018, methodology): “Furthermore, there are many hardware accelerations and computational methods [38], [39] that could be used to improve on the performance of training and testing the DCNNs.”
Demystifying Parallel and Distributed Deep Learning (2018, methodology): “e amountofmemory,andthuswasnotscalable.PracticalimplementationsoftheGEMMmethod,such as in CUDNN[38], implement “implicit GEMM”, in which the Toeplitz matrix is never materialized. It was also reported[49] that the Strassen matrix multiplication[223] can be used for the underlying computation, reduci”
Deep EHR: A Survey of Recent Advances in Deep Learning Techniques for Electronic Health Record (EHR) Analysis (2017, background): “The output from the second pooling layer is fed to a fully connected layer and a final output layer [31].”
MAERI: Enabling Flexible Dataflow Mapping over DNN Accelerators via Reconfigurable Interconnects (2018, background): “Therefore, we need DNN accelerator designs that can efficiently handle myriad dataflows.”
Efficient Processing of Deep Neural Networks: A Tutorial and Survey (2017, methodology): “Other approaches include Strassen [75] and Winograd [76], which rearrange the computation such that the number of multiplications reduce from O(N(3)) to O(N) and by 2.”
Understanding Reuse, Performance, and Hardware Cost of DNN Dataflow: A Data-Centric Approach (2018, methodology): “Although our approach can be applied to various DNN layers—CONV2D, fully-connected (FC), LSTM, separable convolution, and so on—we focus on CONV2D and its variants in this paper because convolutional neural networks (CNNs) are popular, and CONV2D accounts for more than 90% of overall computation in ”
Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks (2018, background): “Since convolutional layers are known to account for over 90% of inference operations [10], [11], we discuss them in this section.”
Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks (2015, background): “In the feedforward computation perspective, a previous study [5] proved that convolution operations will occupy over 90% of the computation time.”