A Simple Semiempirical Short-Channel MOSFET Current–Voltage Model Continuous Across All Regions of Operation and Employing Only Physical Parameters
By Ali Khakifirooz, O. Nayfeh, D. Antoniadis. IEEE Transactions on Electron Devices, 2009
248 citations recorded by the source corpus.
A simple semiempirical model ID(VGS, VDS) for short-channel MOSFETs applicable in all regions of device operation is presented. The model is based on the so-called ldquotop-of-the-barrier-transportrdquo model, and we refer to it as the ldquovirtual sourcerdquo (VS) model. The simplicity of the model comes from the fact that only ten parameters are used. Of these parameters, six are directly obtainable from standard device measurements: 1) gate capacitance in strong inversion conditions (typically at maximum voltage VGS = Vdd); 2) subthreshold swing; 3) drain-induced barrier lowering (DIBL) coefficient; 4) current in weak inversion (typically Ioff at VGS = 0 V) and at high VDS; 5) total resistance at VDS = 0 V and VGS = Vdd and 6), effective channel length. Three fitted physical parameters are as follows: 1) carrier low-field effective mobility; 2) parasitic source/drain resistance, 3) the saturation region carrier velocity at the so-called virtual source. Lastly, a constrained saturation-transition-region empirical parameter is also fitted. The modeled current versus voltage characteristics and their derivatives are continuous from weak to strong inversion and from the linear to saturation regimes of operation. Remarkable agreement with published state-of-the-art planar short-channel strained devices is demonstrated using physically meaningful values of the fitted physical parameters. Moreover, the model allows for good physical insight in device performance properties, such as extraction of the VSV, which is a parameter of critical technological importance that allows for continued MOSFET performance scaling. The simplicity of the model and the fact that it only uses physically meaningful parameters provides an easy way for technology benchmarking and performance projection.
Subfields: Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/ed2c708140b0ebc134fa8da185ec40d70b6d5d60
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In Electrical and Electronic Engineering
- Eric Pop
- Wilfried E. Haensch
- Vladimir Marko Stojanovic
- H. Philip Wong
- Li-Shiuan Peh
- Chi-Shuen Lee
- Aaron D. Franklin
- Daniele Ielmini
Citations in the corpus
- DSENT - A Tool Connecting Emerging Photonics with Electronics for Opto-Electronic Networks-on-Chip Modeling (2012, methodology): “Models for the 32 nm node and below are projected [26] using the virtualsource transport of [27] and the parasitic capacitance model of [28].”
- A Compact Virtual-Source Model for Carbon Nanotube FETs in the Sub-10-nm Regime—Part I: Intrinsic Elements (2015, methodology): “VIRTUAL SOURCE MODEL FOR CNFETS The VS model is a semi-empirical model with only a few physical parameters, originally developed for short-channel Si MOSFETs that have a gate-controlled source-injection barrier.”