Design issues for Dynamic Voltage Scaling

By T. Burd, Robert W. Brodersen. ISLPED'00: Proceedings of the 2000 International Symposium on Low Power Electronics and Design (Cat. No.00TH8514), 2000

407 citations recorded by the source corpus.

Processors in portable electronic devices generally have a computational load which has time-varying performance requirements. Dynamic Voltage Scaling is a method to vary the processor's supply voltage so that it consumes the minimal amount of energy by operating at the minimum performance level required by the active software processes. A dynamically varying supply voltage has implications on the processor circuit design and design flow, but with some minimal constraints it is straightforward to design a processor with this capability.

Subfields: Electrical and Electronic Engineering, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/dafd9c2180a5c3582a45f690f4dd7b4c864db969

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Electrical and Electronic Engineering

1. Niraj Kumar Jha
2. Li-Shiuan Peh
3. Robert W. Brodersen
4. Dimitrios D. Vergados
5. Nikolaos A. Pantazis

In Hardware and Architecture

1. Niraj Kumar Jha
2. Li-Shiuan Peh
3. Dimitrios D. Vergados
4. Nikolaos A. Pantazis

Citations in the corpus

• Dynamic voltage scaling with links for power optimization of interconnection networks (2003, background): “Dynamic voltage scaling (DVS) has been proposed and widely deployed for microprocessors [2, 10, 25], uncovering significant power savings [11].”
• A dynamic voltage scaled microprocessor system (2000, background): “Hence, the fundamental trade-off in DVS system design is to make the processor more tolerant of supply ripple so that the capacitance can be reduced to minimize transition time and energy [17].”