FPGA implementation of a large-number multiplier for fully homomorphic encryption
By Wei Wang, Xinming Huang. 2013
50 citations recorded by the source corpus.
Subfields: Artificial Intelligence, Information Systems
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Citations in the corpus
- HEAX: An Architecture for Computing on Encrypted Data (2019, methodology): “The security parameters for which we have instantiated HEAX are borrowed from the HE security standards [2] for 128-bit classical security.”
- A Survey on Homomorphic Encryption Schemes (2017, background): “…and reconfigurable environment provided by FPGAs motivates many researchers to speed up the practicality of FHE schemes [Cousins et al. 2012; Wang and Huang 2013; Cao et al. 2013; Moore et al. 2013; Chen et al. 2015; Cao et al. 2014; Moore et al. 2014a; Cousins et al. 2014; Roy et al. 2015;…”
- Accelerating Somewhat Homomorphic Evaluation using FPGAs (2015, methodology): “FPGA NTT transform [37] GH-FHE Stratix V FPGA 0.”
- Modular Hardware Architecture for Somewhat Homomorphic Function Evaluation (2015, methodology): “Wang and Huang [39,40] later showed that this multiplication can be further accelerated by a factor of approximately two together with significant reductions in power consumption by using FPGA and ASIC.”
- Accelerating NTRU based homomorphic encryption using GPUs (2014, methodology): “To tackle the efficiency bottleneck the use of alternative platforms, such as GPUs [16], reconfigurable logic [17]–[21] and custom ASIC [22], [23] has been proposed.”
- Accelerating Homomorphic Evaluation on Reconfigurable Hardware (2015, methodology): “An FPGA implementation of an integer multiplier for the Gentry-Halevi [24] FHE scheme is proposed in [43].”
- HEPCloud: An FPGA-Based Multicore Processor for FV Somewhat Homomorphic Function Evaluation (2018, result): “Hence, it is not surprising that during the recent years several publications [8], [13], [14], [15], [26], [28], [31], [33], [40], [41] have reported results”
- FPGA-Based High-Performance Parallel Architecture for Homomorphic Computing on Encrypted Data (2019, background): “In the literature there are several reported hardware implementation that try to speedup performance of HE schemes [11]–[21].”
- Accelerating integer-based fully homomorphic encryption using Comba multiplication (2014, methodology): “Furthermore, a design for a large-number multiplier for FHE targeting a Stratix-V FPGA technology was presented last year by Wang et al. [15]; this multiplier uses the FFT algorithm and is reported to be twice as fast as the same multiplication implemented on the NVIDA C2050 GPU.”
- High-Speed Fully Homomorphic Encryption Over the Integers (2014, methodology): “An FPGA implementation of a multiplier for the GH FHE scheme was proposed by Wang and Huang [19] and is stated to be about twice as fast as the previously mentioned GPU implementation [13].”
- Accelerating LTV Based Homomorphic Encryption in Reconfigurable Hardware (2015, background): “NTT transform [37] GH-FHE Stratix V FPGA 0.”
- A Custom Accelerator for Homomorphic Encryption Applications (2017, methodology): “present an optimized version of their result [17], which achieves speed-up factors of 174, 7.”