FPGA-Based High-Performance Parallel Architecture for Homomorphic Computing on Encrypted Data

By Sujoy Sinha Roy, Furkan Turan, Kimmo U. Järvinen, Frederik Vercauteren, Ingrid M. R. Verbauwhede. 2019

208 citations recorded by the source corpus.

—Homomorphic encryption is a tool that enables computation on encrypted data and thus has applications in privacy-preserving cloud computing. Though conceptually amazing, implementation of homomorphic encryption is very challenging and typically software implementations on general purpose computers are extremely slow. In this paper we present our year long effort to design a domain speciﬁc architecture in a heterogeneous Arm+FPGA platform to accelerate homomorphic computing on encrypted data. We design a custom co-processor for the computationally expensive operations of the well-known Fan-Vercauteren (FV) homomorphic encryption scheme on the FPGA, and make the Arm processor a server for executing different homomorphic applications in the cloud, using this FPGA-based co-processor. We use the most recent arithmetic and algorithmic optimization techniques and perform design-space exploration on different levels of the implementation hierarchy. In particular we apply circuit-level and block-level pipeline strategies to boost the clock frequency and increase the throughput respectively. To reduce computation latency, we use parallel processing at all levels. Starting from the highly optimized building blocks, we gradually build our multi-core multi-processor architecture for computing. We implemented and tested our optimized domain speciﬁc programmable architecture on a single Xilinx Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit. At 200 MHz FPGA-clock, our implementation achieves over 13x speedup with respect to a highly optimized software implementation of the FV homomorphic encryption scheme on an Intel i5 processor running at 1.8 GHz.

Subfields: Artificial Intelligence, Computational Theory and Mathematics

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Citations in the corpus

HEAX: An Architecture for Computing on Encrypted Data (2019, methodology): “y, which significantly degrades the performance [51] to the extent that it can be worse than naive software execution [53]. (iii) Designing a hardware for a fixed modest-sized parameter, e.g.,n = 212 [54]. However, encryption parameters determine the security-level and the maximum number of consecut”
F1: A Fast and Programmable Accelerator for Fully Homomorphic Encryption (2021, background): “Prior FHE accelerators [20, 21, 27, 65, 66, 71] target individual FHE operations, and miss important ones that they leave to software.”
HEAX: High-Performance Architecture for Computation on Homomorphically Encrypted Data in the Cloud (2019, methodology): “However, the performance degradation due to the offchip memory accesses are not considered in this work which can be the main bottleneck as reported by prior art [67, 60].”
Cheetah: Optimizing and Accelerating Homomorphic Encryption for Private Inference (2020, methodology): “NTT has been ported to FPGAs [48], [52] and GPUs [2], [3], [17] to speedup polynomial multiplication.”