Point-to-point connectivity between neuromorphic chips using address events

By Kwabena A. Boahen. 2000

685 citations recorded by the source corpus.

Subfields: Cellular and Molecular Neuroscience, Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/bf533762bda3087966344c731bdb1351328515eb

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In Cellular and Molecular Neuroscience

In Electrical and Electronic Engineering

Citations in the corpus

Deep Learning With Spiking Neurons: Opportunities and Challenges (2018, methodology): “The origin of this view is the address event representation (AER) protocol (Mahowald, 1994; Boahen, 2000), which is used to connect, e.g., event-based sensors (Lichtsteiner et al., 2008) via digital interconnect to neuromorphic chips (Indiveri et al., 2011; Amir et al., 2017) or digital…”
A 240 × 180 130 dB 3 µs Latency Global Shutter Spatiotemporal Vision Sensor (2014, background): “A fair arbitration circuit [13] chooses among all active requesting rows and acknowledges a single one (RA).”
Neuromorphic Silicon Neuron Circuits (2011, methodology): “…systems, the strategy used to transmit spikes off-chip is to use the address-event representation (AER; Lazzaro et al., 1993; Deiss et al., 1998; Boahen, 2000): Each spiking neuron is assigned an address and when a neuron ﬁres its address is instantaneously put on a digital bus, using…”
Advancing Neuromorphic Computing With Loihi: A Survey of Results and Outlook (2021, methodology): “In addition to USB connectivity, this device includes a second FPGA that exposes the Loihi mesh interface in address event representation (AER) [17] form compatible with the IniVation DAVIS240C [18] event-based camera and offers extensibility for other hardware sensors and actuators.”
HOTS: A Hierarchy of Event-Based Time-Surfaces for Pattern Recognition (2017, methodology): “Most of these vision sensors output visual information about the scene in the form of asynchronous address events using the Address Event Representation protocol [10] and encode the visual information in the time dimension rather than as a voltage, charge, or current.”
On Spike-Timing-Dependent-Plasticity, Memristive Devices, and Building a Self-Learning Visual Cortex (2011, background): “…of asynchronous design (Sparsø and Furber, 2001; Martin and Nyström, 2006) leading to robust unarbitrated (Mortara et al., 1995) and arbitrated (Boahen, 1996, 2000) asynchronous event readout, combined with the availability of user-friendly FPGA external support for interfacing and new…”
Retinomorphic Event-Based Vision Sensors: Bioinspired Cameras With Spiking Output (2014, methodology): “The information carried by these spikes is maximized by the retinal processing, encompassing highly evolved adaptive filtering and sampling mechanisms to improve coding efficiency [17], such as follows.”
CIFAR10-DVS: An Event-Stream Dataset for Object Classification (2017, background): “Neuromorphic vision based on neuromorphic cameras (Delbruck, 2008; Lichtsteiner et al., 2008; Serrano-Gotarredona and Linares-Barranco, 2013; Yang et al., 2015) which converts visual information to address-event-representation (AER; Boahen, 2000) event streams has garnered increasing attention.”
A 128$\,\times$ 128 1.5% Contrast Sensitivity 0.9% FPN 3 µs Latency 4 mW Asynchronous Frame-Free Dynamic Vision Sensor Using Transimpedance Preamplifiers (2013, methodology): “The AER read-out scheme implemented in this design is Boahen’s row parallel technique which latches all the events generated simultaneously in a row and reads them out sequentially, significantly speeding up the read out process when high event rates have to be managed [55].”
A Scalable Multicore Architecture With Heterogeneous Memory Structures for Dynamic Neuromorphic Asynchronous Processors (DYNAPs) (2017, background): “these architectures share the same data representation and signal communication protocol: the Address-Event Representation (AER) [9], [10].”
CAVIAR: A 45k Neuron, 5M Synapse, 12G Connects/s AER Hardware Sensory–Processing– Learning–Actuating System for High-Speed Visual Object Recognition and Tracking (2009, background): “Restrictions apply.”
A QVGA 143 dB Dynamic Range Frame-Free PWM Image Sensor With Lossless Pixel-Level Video Compression and Time-Domain CDS (2011, methodology): “and intensity values can be resolved by using time-based PWM exposure measurement and asynchronous, event-based AER information encoding and data communication [5], [16], [17].”
Neuromorphic Electronic Circuits for Building Autonomous Cognitive Systems (2014, background): “For example, it has been recently demonstrated how these time-multiplexing schemes can sustain more than 60 mega events/s, representing the synchronous activity of one million neurons firing at a rate of 60 Hz [99], [118].”
A reconfigurable on-line learning spiking neuromorphic processor comprising 256 neurons and 128K synapses (2015, methodology): “Finally, peripheral asynchronous I/O logic circuits are used for receiving input spikes and transmitting output ones, using the Address-Event Representation (AER) communication protocol (Deiss et al., 1998; Boahen, 2000).”
AER EAR: A Matched Silicon Cochlea Pair With Address Event Representation Interface (2007, background): “This representation is ideal for communicating sparse events from many sources using a narrow channel [1], [2].”
Neurogrid: A Mixed-Analog-Digital Multichip System for Large-Scale Neural Simulations (2014, background): “The transmitter dispatches multiple spikes from a row and the receiver delivers multiple spikes to a row, enhancing throughput compared to designs that dispatch or deliver spikes one by one [19]–[21].”
Memory and Information Processing in Neuromorphic Systems (2015, methodology): “An adaptation of the neural model to allow transfer of parameters to a 784-500-500-10 layer spiking DBN was described in [27] with good performance on the MNIST digit database [62].”