Time Dependence of Bias-Stress-Induced SiC MOSFET Threshold-Voltage Instability Measurements

By A. Lelis, D. Habersat, R. Green, A. Ogunniyi, M. Gurfinkel, J. Suehle, N. Goldsman. IEEE Transactions on Electron Devices, 2008

310 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/add64bd15766f045794b9409f25d7ef0496db652

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In Electrical and Electronic Engineering

1. Paolo Mattavelli
2. Zheng Chen
3. Dushan Boroyevich
4. Yun Wei Li
5. Frede Blaabjerg
6. Xiongfei Wang
7. José Raúl Rodríguez Rodríguez
8. Patricio Cortes

Citations in the corpus

• Gate Oxide Degradation of SiC MOSFET in Switching Conditions (2014, background): “However, studies presented in [2] and [3] have demonstrated that the threshold voltage is not stable due to electron injection into gate oxide traps.”
• Reliability Issues of SiC MOSFETs: A Technology for High-Temperature Environments (2010, background): “[5] demonstrated that the threshold voltage is not stable due to electron tunneling into and out of the oxide traps.”
• A 1200-V, 60-A SiC MOSFET Multichip Phase-Leg Module for High-Temperature, High-Frequency Applications (2014, background): “whenever a voltage bias appears on the gate [14], [15].”