Content-addressable memory (CAM) circuits and architectures: a tutorial and survey

By K. Pagiamtzis, A. Sheikholeslami. IEEE Journal of Solid-State Circuits, 2006

1,281 citations recorded by the source corpus.

How researchers see this paper

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Software Defined Optical Networks (SDONs): A Comprehensive Survey (2015, neutral): “Therefore, the flow actions are commonly stored in Ternary Content Addressable Memories (TCAMs) [403], which are limited to storing on the order of thousands of distinct entries.”
Survey on Network Virtualization Hypervisors for Software Defined Networking (2015, background): “We sub-classify the centralized hypervisors into hypervisors for general networks, hypervisors for special network types (e.g., optical or wireless networks), and policybased hypervisors.”
A Scalable Multicore Architecture With Heterogeneous Memory Structures for Dynamic Neuromorphic Asynchronous Processors (DYNAPs) (2017, methodology): “The CAM cells make use of NOR-type 9T circuits and of a pre-charge-high Match-Line scheme [31].”
A 28 nm Configurable Memory (TCAM/BCAM/SRAM) Using Push-Rule 6T Bit Cell Enabling Logic-in-Memory (2016, background): “[4], [5], or even 16 transistors for a TCAM [4], as shown in Fig.”
A reality check for content centric networking (2011, background): “In order to achieve a single lookup in the off-chip memory, a maximum of 20 million pre.xes can be supported assuming 200 Mbits on-chip memory.”
A survey of quantum image representations (2015, neutral): “, content-addressable memories for network routers [69]).”