Chemical mechanical planarization for microelectronics applications

By P. Zantye, Ashok Kumar, A. Sikder. 2004

596 citations recorded by the source corpus.

Subfields: Biomedical Engineering, Electrical and Electronic Engineering, Electronic, Optical and Magnetic Materials

View Paper: https://www.semanticscholar.org/paper/827015555e4f99433da403625f22c7ee95b56189

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Biomedical Engineering

1. Y. Ein‐Eli
2. Y. Wang
3. Liangchi Zhang
4. A. Biddut
5. D. Starosvetsky
6. Kim-Meow Liew
7. Z. Lei
8. Weixing Xu

In Electrical and Electronic Engineering

1. Y. Ein‐Eli
2. Y. Wang
3. Liangchi Zhang
4. J. Foord
5. A. Biddut
6. D. Starosvetsky
7. Weixing Xu

In Electronic, Optical and Magnetic Materials

1. Y. Ein‐Eli
2. Y. Wang
3. Liangchi Zhang
4. J. Foord
5. A. Biddut
6. D. Starosvetsky

Citations in the corpus

• Review on copper chemical–mechanical polishing (CMP) and post-CMP cleaning in ultra large system integrated (ULSI)—An electrochemical perspective (2007, methodology): “Major problem in particle removing is heir strong adhesion to the surface due to the developed physical nd chemical adsorption, or alternatively embedding of particles nto the planarized surface by the CMP pad would occur [5,81].”
• Chemical mechanical polishing of thin film diamond (2013, methodology): “With this technique a softer polyester based polishing pad is used rather than a hard metal scaife with the aid of a colloidal silica (50– 200 nm) [14] based polishing slurry at room temperatures.”
• Chemical Effect on the Material Removal Rate in the CMP of Silicon Wafers (2010, methodology): “Due to its global planarization capability, chemo-mechanical olishing (CMP) is currently a main processing method in the fabication of integrated circuits [1,2].”
• Synthesis of CeO2-coated SiO2 nanoparticle and dispersion stability of its suspension (2008, background): “The progressively decreasing feature size of the circuit comonents has tremendously increased the need for global surface lanarization [1–6].”