Designing reliable systems from unreliable components: the challenges of transistor variability and degradation

By Shekhar Y. Borkar. IEEE Micro, 2005

1,426 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/5236160832766c58b1be2bf4f76f33d9d25b4600

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In Electrical and Electronic Engineering

Citations in the corpus

Thousand Core ChipsA Technology Perspective (2007, background): “Chips will encounter dynamic variations of supply v oltage and temperature; frequent and intermittent soft-errors; and transistors that slowly age and degrade over time, degrading circuit performance [6].”
FTI: High performance Fault Tolerance Interface for hybrid systems (2011, background): “First, the progress in transistors size will increase the SER several times [40, 10] in such way that soft errors are expected to be the most common type of failures for post-petascale systems.”
On the Robustness of a Neural Network (2017, result): “…a machine, hosting the neural network as a software abstraction, to a more granular view where a single neuron is the unit of failure, is somewhat equivalent to the approach taken in a paper by Borkar [41] on the failures of single transistors, or the paper by Constantinescu on VLSI circuits [42].”
Flip Feng Shui: Hammering a Needle in the Software Stack (2016, background): “For example, a large fraction of the DRAM chips produced in recent years are prone to bit flips [34, 51], and hardware errors in CPUs are expected to become mainstream in the near future [10, 16, 37, 53].”
Addressing failures in exascale computing (2014, background): “Burn-in for screening early-life failures is becoming increasingly challenging (Nigh and Gattiker, 2000; Kundu et al., 2004; Borkar, 2005; Carulli and Anderson, 2005; Van Horn, 2005).”
Process Technology Variation (2011, background): “A LTHOUGH there has been a trend in the complementary metal–oxide–semiconductor (CMOS) literature in recent years to describe process variation as a new challenge associated with advanced CMOS technologies [1], process”
Shoestring: probabilistic soft error reliability on the cheap (2010, methodology): “[5] S. Borkar.”
Circuit Failure Prediction and Its Application to Transistor Aging (2007, background): “NBTI is expected to be dominant in future scaled-CMOS technologies [Borkar 05, Massey 04].”
Advances in Computational Intelligence (2003, neutral): “While thermal management of FPGA-based systems will become increasingly important in the foreseeable future due to shrinking device structures and increasing densities [42], our sorting and matrix multiplication applications on today’s FPGA technology, however, do not generate significant heat.”
The Landscape of Parallel Computing Research: A View from Berkeley (2006, neutral): “[Borkar 2005] [Mukherjee et al 2005] 4.”
Understanding Error Propagation in Deep Learning Neural Network (DNN) Accelerators and Applications (2017, background): “Given that the technology keeps scaling to smaller feature sizes [5, 16], it will be more important to mitigate datapath faults in the future.”