A digital neurosynaptic core using embedded crossbar memory with 45pJ per spike in 45nm

By Paul A. Merolla, John V. Arthur, F. Akopyan, Nabil Imam, R. Manohar, Dharmendra S. Modha. IEEE Custom Integrated Circuits Conference, 2011

448 citations recorded by the source corpus.

Subfields: Artificial Intelligence, Cognitive Neuroscience, Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/41d044095628119bda85189d7b4e8acd7bd8d79e

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Citations in the corpus

Fast-classifying, high-accuracy spiking deep networks through weight and threshold balancing (2015, background): “There are significant advantages of this approach: pseudo-simultaneity of input and output can be achieved [21], time-varying inputs can be more efficiently processed [16], and more efficient computation on specialized hardware can be accomplished [22].”
DRISA: A DRAM-based Reconfigurable In-Situ Accelerator (2017, methodology): “TrueNorth [29, 62, 63] computes with on-chip SRAM-based crossbars and counters.”
A Survey of Neuromorphic Computing and Neural Networks in Hardware (2017, unknown): “[1378], [1379], [1390], [1427], [1433], [1563], [1567], [1593],”
Convolutional networks for fast, energy-efficient neuromorphic computing (2016, background): “Indeed, the specification for TrueNorth and a prototype chip (39) were developed in 2011, before the recent resurgence of convolutional networks in 2012 (25).”
DaDianNao: A Machine-Learning Supercomputer (2014, methodology): “Finally, the IBM Cognitive Chip [39] is a functional chip capable of implementing 256 neurons and 256K synapses in 4mm(2) at 45nm.”
Deep Learning in Spiking Neural Networks (2018, background): “DBNs and convolutional DBNs have successfully been employed inmany areas such as visual processing (Krizhevsky & Hinton, 2010; Liu, Han, Meng, & Tong, 2014; Mleczko, Kapuściński, & Nowicki, 2015; Susskind, Hinton, Movellan, &Anderson, 2008), audio processing (Hamel& Eck, 2010; Kang, Qian, & Meng, 20”
Learning in spiking neural networks (2013, background): “Spikes are transmitted from one neuron to subsequent ones using a communication crossbar (Merolla et al., 2011).”
Unsupervised learning of digit recognition using spike-timing-dependent plasticity (2015, methodology): “Typically, the training procedure used for such rate-based training is based on popular models in machine learning like the Restricted Boltzman Machine (RBM) or convolutional neural networks.”
PRIME: A Novel Processing-in-Memory Architecture for Neural Network Computation in ReRAM-Based Main Memory (2016, unknown): “There are also many other studies on accelerating NNs on the platforms of GPU [16], [41], [42], FPGA [43], [44], [45] and ASIC [17], [18], [19], [36], [37], [46].”
ISAAC: A Convolutional Neural Network Accelerator with In-Situ Analog Arithmetic in Crossbars (2016, background): “At the moment, these architectures [27], [44], [47], based on spiking neural networks, are competitive with CNNs and DNNs in terms of accuracy in a limited number of domains.”
DianNao: a small-footprint high-throughput accelerator for ubiquitous machine-learning (2014, methodology): “This approach has been recently used for perceptron or spike-based hardware neural networks [30, 38].”