MinneSPEC: A New SPEC Benchmark Workload for Simulation-Based Computer Architecture Research
By A. KleinOsowski, David J. Lilja. IEEE computer architecture letters, 2002
417 citations recorded by the source corpus.
Subfields: Computer Networks and Communications, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/183d411aaa64c5c836ceefd5255f99a26cd34a2b
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Computer Networks and Communications
- Jichuan Chang
- G. Sohi
- Engin Ipek
- José F. Martínez
- Christian Bienia
- Nevin Kirman
- Meyrem Kirman
- Kai Li
In Hardware and Architecture
- Jichuan Chang
- G. Sohi
- Engin Ipek
- José F. Martínez
- Christian Bienia
- Nevin Kirman
- Meyrem Kirman
- Kai Li
Citations in the corpus
- Cooperative Caching for Chip Multiprocessors (2006, methodology): “To create as realistic a match to the previous paper as possible, we also include results for 9 SPECOMP benchmarks [3] and 4 single-threaded SPEC2000 benchmarks with the MinneSPEC reduced input set [27], all running on 8-core CMPs.”
- Benchmarking modern multiprocessors (2011, methodology): “Another method is to reduce the size of the input for a benchmark [47, 91].”
- Core fusion: accommodating software diversity in chip multiprocessors (2007, methodology): “We use the MinneSpec reduced input sets [22].”