Energy-effective issue logic

By D. Folegnani, Antonio González. Proceedings 28th Annual International Symposium on Computer Architecture, 2001

309 citations recorded by the source corpus.

The issue logic of a dynamically-scheduled superscalar processor is a complex mechanism devoted to start the execution of multiple instructions every cycle. Due to its complexity, it is responsible for a significant percentage of the energy consumed by a microprocessor. The energy consumption of the issue logic depends on several architectural parameters, the instruction issue queue size being one of the most important. In this paper we present a technique to reduce the energy consumption of the issue logic of a high-performance superscalar processor. The proposed technique is based on the observation that the conventional issue logic wastes a significant amount of energy for useless activity. In particular, the wake-up of empty entries and operands that are ready represents an important source of energy waste. Besides, we propose a mechanism to dynamically reduce the effective size of the instruction queue. We show that on average the effective instruction queue size can be reduced by a factor of 26% with minimal impact on performance. This reduction together with the energy saved for empty and ready entries result in about 90.7% reduction in the energy consumed by the wake-up logic, which represents 14.9% of the total energy of the assumed processor.

Subfields: Computer Networks and Communications, Electrical and Electronic Engineering, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/139e0076adf74a849d6ce87c673559d700b82e92

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In Computer Networks and Communications

In Electrical and Electronic Engineering

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Citations in the corpus

HotLeakage: A Temperature-Aware Model of Subthreshold and Gate Leakage for Architects (2003, background): “Recently, a great deal of research work in the architecture community has focused o n r ucing leakage power in the caches [11, 13, 14, 18, 22, 27, 28], branch predictor [15, 16], regi ster file [2], issue queues [12, 21, 8, 9], and the ALUs [10].”