Energy reduction for STT-RAM using early write termination

By Ping Zhou, Bo Zhao, Jun Yang, Youtao Zhang. IEEE/ACM International Conference on Computer-Aided Design, 2009

352 citations recorded by the source corpus.

Subfields: Atomic and Molecular Physics, and Optics, Computer Networks and Communications, Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/e591bd4ebf3dc0d46b49f4b2544267078b6b8251

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Atomic and Molecular Physics, and Optics

1. Yuan Xie

In Computer Networks and Communications

1. Onur Mutlu
2. Mahmut Taylan Kandemir
3. Anand Sivasubramaniam
4. Emre Kultursay
5. Yuan Xie
6. Naveen Muralimanohar
7. Rajeev Balasubramonian
8. Zhang Tao

In Electrical and Electronic Engineering

1. Onur Mutlu
2. Mahmut Taylan Kandemir
3. Anand Sivasubramaniam
4. Emre Kultursay
5. Rajeev Balasubramonian
6. Naveen Muralimanohar
7. Yuan Xie
8. Shimeng Yu

Citations in the corpus

• Overcoming the challenges of crossbar resistive memory architectures (2015, background): “Researchers have looked at techniques such as early write termination [58], hybrid SRAM/STT-RAM architecture [50] and read-preemptive write-buffer designs [46] to mitigate the long write latency of STT-RAM.”
• Evaluating STT-RAM as an energy-efficient main memory alternative (2013, methodology): “While [20] proposes to migrate most of the functionality of a modern microprocessor from CMOS to STT-RAM technology, others [27], [56], [53], [57], [62], [67] proposed use of STT-RAM on chip for cache or embedded DRAM replacement.”