VARIOT: a novel multilayer tunnel barrier concept for low-voltage nonvolatile memory devices

By B. Govoreanu, P. Blomme, Maarten Rosmeulen, J. Houdt, K. D. Meyer. IEEE Electron Device Letters, 2003

186 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering, Electronic, Optical and Magnetic Materials

View Paper: https://www.semanticscholar.org/paper/e1259badf8986c5ae74ae645ef5660d56239ba9c

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Electrical and Electronic Engineering

1. Patrick Polakowski
2. Tsu-Jae King

Citations in the corpus

• High Endurance Ferroelectric Hafnium Oxide-Based FeFET Memory Without Retention Penalty (2018, methodology): “Although the MFIS stack structure enabled FeFET realization for more than half a century, the HfO2-MFIS stack is coming to be structurally very similar to a flash memory based on the variable oxide thickness (VARIOT) concept [11], as summarized in Table I.”
• Impact of crystal size and tunnel dielectric on semiconductor nanocrystal memory performance (2003, background): “The multilayer tunnel barrier proposed in [ 17 ] could improve the programming speed further with specified retention time of ten years.”
• BE-SONOS: A bandgap engineered SONOS with excellent performance and reliability (2005, background): “However, such concept often requires high-k gate dielectric [9] and so far no practical application is successful.”