Face classification using electronic synapses
By Peng Yao, Huaqiang Wu, Bin Gao, S. Eryilmaz, Xueyao Huang, Wenqiang Zhang, Qingtian Zhang, Ning Deng, Luping P. Shi, H. Philip Wong and 1 more. Nature Communications, 2017
828 citations recorded by the source corpus.
Conventional hardware platforms consume huge amount of energy for cognitive learning due to the data movement between the processor and the off-chip memory. Brain-inspired device technologies using analogue weight storage allow to complete cognitive tasks more efficiently. Here we present an analogue non-volatile resistive memory (an electronic synapse) with foundry friendly materials. The device shows bidirectional continuous weight modulation behaviour. Grey-scale face classification is experimentally demonstrated using an integrated 1024-cell array with parallel online training. The energy consumption within the analogue synapses for each iteration is 1,000 × (20 ×) lower compared to an implementation using Intel Xeon Phi processor with off-chip memory (with hypothetical on-chip digital resistive random access memory). The accuracy on test sets is close to the result using a central processing unit. These experimental results consolidate the feasibility of analogue synaptic array and pave the way toward building an energy efficient and large-scale neuromorphic system. Using chips that mimic the human brain to perform cognitive tasks, namely neuromorphic computing, calls for low power and high efficiency hardware. Here, Yaoet al. show on-chip analogue weight storage by integrating non-volatile resistive memory into a CMOS platform and test it in facial recognition.
Subfields: Cognitive Neuroscience, Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/d8c44edc0bf50df29c6f1335157ff1bcdfdc3e31
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Citations in the corpus
- A compute-in-memory chip based on resistive random-access memory (2022, neutral): “…1.6-times to 2.3-times lower EDP and 7-times to 13-times higher computational density (measured by throughput per million of RRAMs) at various MVM input and output bit-precisions than previous state-of-the-art RRAM-based CIM chips, despite being fabricated at an older technology node 17–27 , 36 .”
- Fully hardware-implemented memristor convolutional neural network (2020, methodology): “Several experimental demonstrations 4,24–28 related to practical applications of in-memory computing have been reported as well.”
- Neuro-inspired computing chips (2020, methodology): “4m, or a parallel pseudo-crossbar array 22 (consisting of 1T1R cells), as shown in Fig.”
- Photo-stability of CsPbBr3 perovskite quantum dots for optoelectronic application (2016, neutral): “Nature, 2015, 521: 436-444 [2] Yao P, Wu H, Gao B, et al.”