Fully hardware-implemented memristor convolutional neural network
By Peng Yao, Huaqiang Wu, Bin Gao, Jianshi Tang, Qingtian Zhang, Wenqiang Zhang, J. Joshua Yang, He Qian. Nature, 2020
2,009 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering, Polymers and Plastics
View Paper: https://www.semanticscholar.org/paper/f16f46456b3d30f0911c8344687417178bc29bd0
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In Electrical and Electronic Engineering
Citations in the corpus
- A compute-in-memory chip based on resistive random-access memory (2022, positive): “…results using a mixture of hardware characterization and software simulation, for example, emulate the array-level MVM process in software using measured device characteristics 3,5,21,24 , such an approach often fails to model the complete set of non-idealities existing in realistic hardware.”
- A crossbar array of magnetoresistive memory devices for in-memory computing (2022, background): “Of the four NVMs that can be produced at volume—that is, resistive random-access memory 8–13 , phase-change random-access memory 14,15 , flash memory 16–19 and spin-transfer-torque magnetoresistive random-access memory (STT-MRAM, or MRAM for brevity) 20–22,25 , Here we fill this gap and implement…”
- In-sensor reservoir computing system for latent fingerprint recognition with deep ultraviolet photo-synapses and memristor array (2022, methodology): “1c. Memristors feature excellent adjustable resistive state characteristics and naturally perform the vector-matrix multiplication in an array structure, making it suitable to serve as readout layer 36 – 38 , as shown in the right panel of Fig.”
- Experimental photonic quantum memristor (2021, background): “[31] Peng Yao, Huaqiang Wu, Bin Gao, Jianshi Tang, Qingtian Zhang, Wenqiang Zhang, J Joshua Yang, and He Qian, “Fully hardware-implemented memristor convolutional neural network,” Nature 577, 641–646 (2020).”