Design Tradeoffs for SSD Performance

By Nitin Agrawal, Vijayan Prabhakaran, Ted Wobber, John D. Davis, Mark S. Manasse, Rina Panigrahy. USENIX Annual Technical Conference, 2008

1,199 citations recorded by the source corpus.

View Paper: https://www.semanticscholar.org/paper/d477f021387867930f008c65dab2e62be3be1a0e

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

1. Onur Mutlu
2. Yu Cai
3. Udit Gupta
4. Carole-Jean Wu
5. Saugata Ghose
6. Yixin Luo
7. Feng Chen
8. Erich F. Haratsch

Citations in the corpus

• LDPC-in-SSD: making advanced error correction codes work effectively in solid state drives (2013, methodology): “Using representative workload traces and the SSD model [15] in DiskSim [16] and based upon extensive characterization of NAND flash memory chip reliability and LDPC code decoding, we quantitatively evaluate the effectiveness of these techniques, and results show that they can reduce the latency…”
• Error Characterization, Mitigation, and Recovery in Flash-Memory-Based Solid-State Drives (2017, background): “Much like banks in a multi-bank memory (e.g., DRAM banks [31, 91, 92, 100, 102, 104, 105, 131, 137, 138]), the planes can execute flash operations in parallel, but the planes within a die share a single set of data and control buses [1].”
• ChunkStash: Speeding Up Inline Storage Deduplication Using Flash Memory (2010, background): “The typical access latencies for read, write, and erase operations are 25 microseconds, 200 microseconds, and 1500 microseconds, respectively [9].”
• Essential roles of exploiting internal parallelism of flash memory based solid state drives in high-speed data processing (2011, background): “Actual implementations may vary across different models, and previous work [3] [10] gives detailed descriptions about the architecture of SSDs.”
• SoftSKU: Optimizing Server Architectures for Microservice Diversity @Scale (2019, background): “For example, microsecondscale overheads that arise from accesses to Flash [40], emerging memory technologies like 3D XPoint by Intel and Micron [41–43], or 40-100 Gb/s Infiniband and Ethernet network interactions [44] can significantly degrade the request latency of microsecond-scale microservices [”
• RecSSD: near data processing for solid state drive based recommendation inference (2021, background): “One single flash memory package provides a limited bandwidth of 32-40MB/sec [11].”
• DeepStore: In-Storage Acceleration for Intelligent Queries (2019, methodology): “We modified SSD-Sim to generate the overall execution time for a given query batch size and different levels of accelerators.”
• PebblesDB: Building Key-Value Stores using Fragmented Log-Structured Merge Trees (2017, background): “High write amplification increases the load on storage devices such as SSDs, which have limited write cycles before the bit error rate becomes unacceptable [3, 26, 39].”
• Data retention in MLC NAND flash memory: Characterization, optimization, and recovery (2015, methodology): “0 [35] with SSD extensions [36] to simulate the performance of our proposed ROR technique with a 7-day refresh period.”
• Performance impact and interplay of SSD parallelism through advanced commands, allocation strategy and data granularity (2011, result): “…the results of our experiments, we found that: (1) larger pages tend to have significantly negative impact on SSD performance under many workloads; (2) different physical-page allocation schemes have different deployment en­vironments, where an optimal allocation scheme can be found for each…”
• CAFTL: A Content-Aware Flash Translation Layer Enhancing the Lifespan of Flash Memory based Solid State Drives (2011, methodology): “We should note that this simulator follows a general FTL design [6], and the actual implementations of the SSD on the market can have other specific features.”