Compact Ring-LWE Cryptoprocessor
By Sujoy Sinha Roy, Frederik Vercauteren, Nele Mentens, Donald Donglong Chen, Ingrid M. R. Verbauwhede. Workshop on Cryptographic Hardware and Embedded Systems, 2014
298 citations recorded by the source corpus.
Subfields: Artificial Intelligence
View Paper: https://www.semanticscholar.org/paper/c8619ca909a9ad1cc6cd6ef6089614ca3897e22d
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Artificial Intelligence
- Michael Naehrig
- Frederik Vercauteren
- Peter Schwabe
- Léo Ducas
- Thomas Pöppelmann
- Patrick Longa
- Sujoy Sinha Roy
- Ingrid M. R. Verbauwhede
Citations in the corpus
- F1: A Fast and Programmable Accelerator for Fully Homomorphic Encryption (2021, methodology): “Specifically, we extend prior work [49, 62, 67] in order to support both forward and inverse NCNs using the same hardware as for the standard NTT.”
- HEPCloud: An FPGA-Based Multicore Processor for FV Somewhat Homomorphic Function Evaluation (2018, methodology): “we use the sequential NTT core of [34], then one N-point NTT of a residue polynomial will consume more than 524K cycles.”
- Post-quantum Key Exchange - A New Hope (2016, methodology): “In works like [18, 29, 76], a significant algorithmic effort is devoted to sample from a discrete Gaussian distribution to a rather high precision.”
- Modular Hardware Architecture for Somewhat Homomorphic Function Evaluation (2015, methodology): “To achieve high operating frequency, we follow the pipelining technique from [35] and put pipeline registers in the data paths of the computation circuits.”
- Speeding up the Number Theoretic Transform for Faster Ideal Lattice-Based Cryptography (2016, methodology): “, [29, 33, 20, 2]) have applied a relatively expensive reordering or bit-reversal step before or after the NTT computation.”
- FPGA-Based High-Performance Parallel Architecture for Homomorphic Computing on Encrypted Data (2019, methodology): “In our implementation we store the paired coefficients in the same memory word [30] and construct a dual core NTT algorithm that overcomes the first bottleneck, i.e., access conflict.”
- Accelerating Homomorphic Evaluation on Reconfigurable Hardware (2015, methodology): “While it would also be possible to compute the twiddle factors on-the-fly (as in [36]) this approach would require an additional expensive q′ ×q′ multiplier and modulo unit.”