A superblock-based flash translation layer for NAND flash memory

By Jeong-Uk Kang, Heeseung Jo, Jinsoo Kim, Joonwon Lee. International Conference on Embedded Software, 2006

338 citations recorded by the source corpus.

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

DFTL: a flash translation layer employing demand-based selective caching of page-level address mappings (2009, methodology): “Recent log buffer-based FTL schemes [13, 20] have tried to reduce the number of these full merge operations by segregating log blocks based on access patterns.”
BPLRU: A Buffer Management Scheme for Improving Random Writes in Flash Storage (2008, methodology): “14, 10, 6, 2, 17, 13 9 [9], [5] M[1] [14], [8, 9, 10], [6] 2 [2], [17] M[12, 13]”
LAST: locality-aware sector translation for NAND flash memory-based storage systems (2008, methodology): “BAST shows the worst garbage collection ef.ciency compared to other FTLs.”
Error Characterization, Mitigation, and Recovery in Flash-Memory-Based Solid-State Drives (2017, methodology): “In addition to ECC to protect against bit-level errors, many SSDs employ RAID-like parity [49, 78, 124, 155].”