Read-Proof Hardware from Protective Coatings

By Pim Tuyls, Geert Jan Schrijen, Boris Skoric, Jan van Geloven, Nynke Verhaegh, Rob Wolters. Workshop on Cryptographic Hardware and Embedded Systems, 2006

448 citations recorded by the source corpus.

Subfields: Artificial Intelligence, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/a58158409dcc9c2b1a00f36cb24e67166bdba041

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Artificial Intelligence

In Hardware and Architecture

Citations in the corpus

PUF Modeling Attacks on Simulated and Silicon Data (2013, background): “Most typical Weak PUFs, such as the SRAM PUF [18], Butterfly PUF [22] or Coating PUF [47], remain unaffected by our attacks.”
Efficient Helper Data Key Extractor on FPGAs (2008, methodology): “In [5], the authors further reduce the computation and communication complexity of the protocols in [8] and introduce the idea of Intrinsic-PUFs based on the start-up values of SRAM memory values.”
Power-Up SRAM State as an Identifying Fingerprint and Source of True Random Numbers (2009, unknown): “PUFs use physical characteristics for challenge-response authentication.”
Physical unclonable functions (2020, background): “One type of anti-tampering protection is achieved by spraying a coating on the IC to realize a so-called coating PUF (see Supplementary Section 7) 115 .”
A Systematic Method to Evaluate and Compare the Performance of Physical Unclonable Functions (2011, methodology): “2000 IC identification using device mismatch [12] 2001 Physical One-way Function [18] 2002 Physical Random Function [4] 2004 Arbiter PUF [11] 2006 Coating PUF [22] 2007 Ring Oscillator PUF[20], SRAM PUF [6] 2008 Butterfly PUF [10] 2009 PUF using power distribution system of an IC [7] 2010 Glitch PUF”
FPGA Intrinsic PUFs and Their Use for IP Protection (2007, background): “In [38] it was explained that PUFs can be used to store a secret key in a secure way.”
A PUF taxonomy (2019, methodology): “PUF [50] QUALPUF [51] TV PUF [28] VIA PUF [38] Binary Connectivity NEMS PUF [52] Explicit Extrinsic Self-Assembly PUF [53] CNPUF [54] Voltage/ Current MEMS PUF [55] Q EPUF [56] SHIC PUF [10] BoardPUF [5] Capacitance Coating PUF [19] Acoustical PUF [57] Frequency Memristor PUF [58] Bistable state Non”
Provably-Secure Logic Locking: From Theory To Practice (2017, background): “1 Architecture e restore unit of SFLL-exc×k consists of a tamper-proof [50] look-up table (LUT) and XOR gates.”
Physically Unclonable Functions (2012, background): “[145], which is based on the unique capacitance between two metal lines in a silicon chip whose top layer consists of a coating with randomly distributed dielectric particles.”