Aspect-Ratio-Dependent Copper Electrodeposition Technique for Very High Aspect-Ratio Through-Hole Plating

By P. Dixit, Jianmin Miao. 2006

150 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/a4c903ae5ea23e16a270f21acd8c185bcce24192

How researchers see this paper

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In Electrical and Electronic Engineering

1. Y. Nam
2. Sung Jin Kim
3. C. Byon

Citations in the corpus

• Failure mechanisms and optimum design for electroplated copper Through-Silicon Vias (TSV) (2009, background): “Tremendous research effort [1-7] has been devoted to the development and improvement of various TSV fabrication process steps.”
• Fabrication and Characterization of the Capillary Performance of Superhydrophilic Cu Micropost Arrays (2010, methodology): “To minimize void formation, which degrades thermal and mechanical properties, a bottom–up plating scheme is applied [12], [18].”