High Performance Silicon Nanowire Field Effect Transistors

By Yi Cui, Z. Zhong, Deli Wang, Wayne U. Wang, Charles M. Lieber. 2003

2,027 citations recorded by the source corpus.

Subfields: Biomedical Engineering, Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/9b591e1732da550c8e1f15ddf49f1f066dcf1831

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In Biomedical Engineering

In Electrical and Electronic Engineering

Citations in the corpus

Size and temperature effects on the fracture mechanisms of silicon nanowires: Molecular dynamics simulations (2010, background): “Semiconducting nanowires (NWs) are key building blocks in nanotechnology, with many potential applications such as nano-scale transistors (Cui et al., 2003; Wang et al., 2003; Huang and Lieber, 2004), sensors (Cui et al.”
Heat Generation and Transport in Nanometer-Scale Transistors (2006, methodology): “Transistors made from semiconductor nanowires (NWs) have recently received a lot of attention for their currentcarrying capabilities, low synthesis temperature (as low as 275 � C for CVD-grown germanium NWs [51]), and relative ease of fabrication and integration with currently existing technologies ”
Single-crystal metallic nanowires and metal/semiconductor nanowire heterostructures (2004, background): “Attaching electric contacts to individual devices is a first step towards integration, and this step has been addressed using lithographically defined metal electrode”
Highly ordered nanowire arrays on plastic substrates for ultrasensitive flexible chemical sensors. (2007, background): “This may simply arise from the poor quality of the electron-beam deposited SiO 2 dielectric, but it could also result from the inability of the plastic to withstand high-temperature annealing of the contacts, which is crucial for ensuring efficient contact to all wires in the arrays and for minimiz”
High-performance fully depleted silicon nanowire (diameter /spl les/ 5 nm) gate-all-around CMOS devices (2006, background): “High mobilities in nanowire FETs have been reported previously [10], [21], [22] and can probably be due to one or more of the following: cylindrical morphology of the channel”
On the validity of the parabolic effective-mass approximation for the I-V calculation of silicon nanowire transistors (2004, background): “For this reason, silicon nanowire transistors (SNWTs), which allow multigate or gate-all-around structures, are being extensively explored by different experimental groups [2]–[5].”