Origins of threshold voltage shifts in room-temperature deposited and annealed a-In–Ga–Zn–O thin-film transistors

By K. Nomura, T. Kamiya, M. Hirano, Hideo Hosono. 2009

344 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering, Materials Chemistry, Polymers and Plastics

View Paper: https://www.semanticscholar.org/paper/9a60ea3ad50411a6da43e0475b363f480c9c4480

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Citations in the corpus

• Oxygen-Dependent Instability and Annealing/Passivation Effects in Amorphous In–Ga–Zn–O Thin-Film Transistors (2011, background): “[11] (acceptor-like) were formed more easily when the oxygen content was high, and the unoccupied hole-trapping states [10] (donorlike) were formed more easily when the oxygen content”
• Instabilities in Amorphous Oxide Semiconductor Thin-Film Transistors (2010, methodology): “for a combined positive-bias-current stressing (VG > 0;VDS > 0 V) of various gate dielectric/AOS channel stacks, including a 220-nm ALD ATO gate dielectric/PLD amorphous IGZO SBG TTFTs stressed at VG = +30 V and VDS = +1 V [39]; a 150-nm thermal SiO2/40-nm PLD amorphous IGZO channel SBG TFTs stresse”