The Past, Present, and Future of Silicon Photonics

By Richard A. Soref. IEEE Journal of Selected Topics in Quantum Electronics, 2006

1,838 citations recorded by the source corpus.

Subfields: Atomic and Molecular Physics, and Optics, Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/9488372708f0b6dbf055c2a73ddb1c082934afb6

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In Atomic and Molecular Physics, and Optics

In Electrical and Electronic Engineering

Citations in the corpus

Exploiting CMOS Manufacturing to Reduce Tuning Requirements for Resonant Optical Devices (2011, background): “Silicon-based optical interconnects are expected to provide high bandwidth and low-power consumption for electronic chip-level communication, due to their electronics integration capability, proven manufacturing record, and improved bandwidth, density, and energy efficiency [1]–[4].”
Multilayer Silicon Nitride-on-Silicon Integrated Photonic Platforms and Devices (2015, neutral): “with the high refractive index contrast in Si photonic platforms, can enable the manufacturing of densely integrated electronicphotonic components at low costs and high volumes [1]–[3].”
Broadcast and Weight: An Integrated Network For Scalable Photonic Spike Processing (2014, background): “Modern trends in photonic integration practices that support WDM techniques could grant photonic spike processing architectures a pathway to low cost manufacturing [19], [74].”
Waveguide-integrated, ultralow-energy GeSi electro-absorption modulators (2008, background): “The EA effect in semiconductors is intrinsically an ultrafast process that takes place in subpicosecond timescale”
From Scaling Disparities to Integrated Parallelism: A Decathlon for a Decade (2017, background): “In order to interface these arrays to a CMOS ASIC performing the coherent DSP, optics-electronic integration is needed [138], [139], be it mono-”
A micromachining-based technology for enhancing germanium light emission via tensile strain (2012, background): “Equations (1) to (3) describe the stress distribution for a liner deposited on a device layer, where s, t, E, v, 10 and 1 represent material stress, thickness, Young’s modulus, Poisson’s ratio, initial liner strain and final strain, respectively.”