NVSim: A Circuit-Level Performance, Energy, and Area Model for Emerging Nonvolatile Memory

By Xiangyu Dong, Cong Xu, Yuan Xie, N. Jouppi. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2012

1,223 citations recorded by the source corpus.

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MaxNVM: Maximizing DNN Storage Density and Inference Efficiency with Sparse Encoding and Error Mitigation (2019, methodology): “We leverage well-known tools to model the energy, performance, and area of the proposed systems [20, 51].”
CACTI 7 (2017, methodology): “Modeling tools such as the Micron power model [Micron 2005], DRAMPower [Chandrasekar et al. 2012], NVSIM [Dong et al. 2012], and DRAM energy models by Vogelsang [2010] are primarily targeted at either microarchitecture of memory or DRAM die.”
Pinatubo: A processing-in-memory architecture for bulk bitwise operations in emerging non-volatile memories (2016, methodology): “Based on those low-level parameters, we heavily modify NVsim [11] for the NVM circuit modeling, and CACTI-3DD [9] for the main memory modeling, in order to achieve high-level parameters.”
NeuroSim: A Circuit-Level Macro Model for Benchmarking Neuro-Inspired Architectures in Online Learning (2018, methodology): “We follow the same methods of estimation in CACTI [34] and NVSim [35].”
PRIME: A Novel Processing-in-Memory Architecture for Neural Network Computation in ReRAM-Based Main Memory (2016, positive): “The FF subarray is modeled by heavily modiﬁed NVSim, according to the peripheral circuit modiﬁcations, i.e., write driver [84], sigmoid [63], and sense ampliﬁer [64] circuits.”