Transactional Locking II
By D. Dice, Ori Shalev, Nir Shavit. International Symposium on Distributed Computing, 2006
1,026 citations recorded by the source corpus.
Subfields: Computer Networks and Communications, Experimental and Cognitive Psychology, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/76057a3c7b489290afd4a4dccf09b623502619fd
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The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Computer Networks and Communications
- Håkan Grahn
- T. Harris
- J. Larus
- Ravi Rajwar
- Maurice Herlihy
- Eric Koskinen
- Michael Lee Scott
- Christos Kozyrakis
In Experimental and Cognitive Psychology
- Håkan Grahn
- T. Harris
- Eric Koskinen
- Maurice Herlihy
- Ravi Rajwar
- J. Larus
- Chi Cao Minh
- Christos Kozyrakis
In Hardware and Architecture
- Håkan Grahn
- T. Harris
- J. Larus
- Maurice Herlihy
- Ravi Rajwar
- Eric Koskinen
- Michael Lee Scott
- Christos Kozyrakis
Citations in the corpus
- No compromises: distributed transactions with consistency, availability, and performance (2015, background): “FaRM provides strict serializability [35] of all successfully committed transactions.”
- Transactional memory (2010, methodology): “Transactional Locking II (TL2) [91], an improvement of Transactional Locking [98, 99], is a software transactional memory system that uses commit time two-phase locking and a global version-clock validation technique.”
- Hybrid transactional memory (2006, background): “4.4 rand-array benchmark In this section, we report on our simulation studies, in which we used the simple rand-array microbenchmark to evaluate HyTM s ability to mix HTM and STM transactions, and to compare its performance in various con.gurations against standard lock-based approaches.”
- An effective hybrid transactional memory system with strong isolation guarantees (2007, methodology): “A special case is read-only transactions for which there is no need to build or validate the read-set or the write-set [11].”
- Speedy transactions in multicore in-memory databases (2013, result): “Recent STM systems, including TL2 [9], are based on optimistic concurrency control and maintain read and write sets similar to those in OCC databases.”
- STAMP: Stanford Transactional Applications for Multi-Processing (2008, methodology): “• Lazy STM: An x86 port of the TL2 software TM system [13].”
- Transactional Memory, 2nd edition (2010, methodology): “• The Sun C++ compiler with Transactional Memory supports a range of STM back-ends, including TL2 [83], SkySTM [188], HyTM [78] and PhTM [193].”
- Dynamic performance tuning of word-based software transactional memory (2008, methodology): “To evaluate the performance of our basic T INY STM implementation (without hierarchical locking), we have used the same red-black tree benchmark application as used for the evaluation of TL2 in [3].”
- Transactional boosting: a methodology for highly-concurrent transactional objects (2008, background): “In all four tests, boosting substantially improved throughput relative to the baseline TL2 [7] implementation (normalized here to 1).”
- On the correctness of transactional memory (2008, background): “Most transactional memory systems we know of ensure opacity, including DSTM [14], ASTM [18], SXM [13], JVSTM [5], TL2 [6], LSA-STM [25] and RSTM [19].”
- NOrec: streamlining STM by abolishing ownership records (2010, methodology): “As in many STM systems (TML, JudoSTM [29], RingSTM, and even TL2 [7]), NOrec’s global metadata ultimately imposes a limit on scalability, but the serial bottleneck is relatively small.”