Dynamic performance tuning of word-based software transactional memory
By Pascal Felber, Christof Fetzer, Torvald Riegel. ACM SIGPLAN Symposium on Principles & Practice of Parallel Programming, 2008
518 citations recorded by the source corpus.
Subfields: Computer Networks and Communications, Experimental and Cognitive Psychology, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/57fe2b6acccbba91df0847442d2634ffef7ccfb4
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In Computer Networks and Communications
- Håkan Grahn
- Kian-Lee Tan
- Beng Chin Ooi
- Meihui Zhang
- Hao Zhang
- Gang Chen
- Michael M. Swift
- Steven Swanson
In Experimental and Cognitive Psychology
In Hardware and Architecture
Citations in the corpus
- Transactional memory (2010, background): “T INY STM [95] is a lock-based, time-based, and word-based software transactional memory system.”
- In-Memory Big Data Management and Processing: A Survey (2015, background): “STM Much Atomic Operation Large TinySTM [159], Clojure [160], Haskell [161] HTM No or Little Cache, Bus Protocol Small Intel TSX [162], AMD ASF [163]”
- Mnemosyne: lightweight persistent memory (2011, background): “Mnemosyne relies on TinySTM s existing global timestamp counter, which is incremented at every transaction completion.”