Evaluating the security of logic encryption algorithms
By Pramod Subramanyan, Sayak Ray, Sharad Malik. IEEE International Symposium on Hardware Oriented Security and Trust, 2015
734 citations recorded by the source corpus.
Subfields: Artificial Intelligence, Electrical and Electronic Engineering, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/6aa37f2d24d84425a4ef625126868502989d29a9
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In Artificial Intelligence
- Muhammad Yasin
- Jeyavijayan Rajendran
- Ozgur Sinanoglu
- David Zhigang Pan
- Debdeep Mukhopadhyay
- Ramesh Karri
- Manaar Alam
- Meng Li
In Electrical and Electronic Engineering
- Ramesh Karri
- Muhammad Yasin
- Ozgur Sinanoglu
- Jeyavijayan Rajendran
- David Zhigang Pan
- Zheng Zhao
- Meng Li
- Yier Jin
In Hardware and Architecture
- Ramesh Karri
- Muhammad Yasin
- Ozgur Sinanoglu
- Jeyavijayan Rajendran
- Yier Jin
- David Zhigang Pan
- Zheng Zhao
- Meng Li
Citations in the corpus
- On Improving the Security of Logic Locking (2016, methodology): “These techniques include watermarking [20], fingerprinting [21], metering [22], and obfuscation/logic locking [1], [3], [13]–[15], [17], [23], [24].”
- SARLock: SAT attack resistant logic locking (2016, methodology): “:Miter-likecircuittodetermineDIPs[14]. toidentifythecorrectkey[14].”
- Provably-Secure Logic Locking: From Theory To Practice (2017, methodology): “In particular, we launch the SAT aack [44] and the AppSAT [40] against the proposed techniques.”
- AppSAT: Approximately deobfuscating integrated circuits (2017, methodology): “The most recent and strongest deobfuscation attack is one utilizing Boolean Satisfiability (SAT) solvers which we refer to as the SAT attack throughout this paper [4], [5].”
- NN-Lock: A Lightweight Authorization to Prevent IP Threats of Deep Learning Models (2022, methodology): “SAT/SMT-based techniques [Azar et al. 2019; Subramanyan et al. 2015] are quite popular for breaking logic-locking constructions, and due to the similarity mentioned above,”