SARLock: SAT attack resistant logic locking

By Muhammad Yasin, Bodhisatwa Mazumdar, Jeyavijayan Rajendran, Ozgur Sinanoglu. IEEE International Symposium on Hardware Oriented Security and Trust, 2016

384 citations recorded by the source corpus.

Subfields: Artificial Intelligence, Electrical and Electronic Engineering, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/e0711b31bed82c68d9edd100607b650b2c39ba4d

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Artificial Intelligence

1. Muhammad Yasin
2. Jeyavijayan Rajendran
3. Ozgur Sinanoglu
4. David Zhigang Pan
5. Meng Li
6. Yier Jin

In Electrical and Electronic Engineering

1. Muhammad Yasin
2. David Zhigang Pan
3. Zheng Zhao
4. Meng Li
5. Yier Jin
6. Kaveh Shamsi
7. Travis Meade
8. Ozgur Sinanoglu

In Hardware and Architecture

1. Muhammad Yasin
2. Yier Jin
3. David Zhigang Pan
4. Zheng Zhao
5. Meng Li
6. Kaveh Shamsi
7. Travis Meade
8. Ozgur Sinanoglu

Citations in the corpus

• Provably-Secure Logic Locking: From Theory To Practice (2017, methodology): “Attack/Defense Anti-SAT [52] SARLock [55] TTLock [61] SFLL-HDh SFLL-ƒexc×k”
• AppSAT: Approximately deobfuscating integrated circuits (2017, methodology): “The P function can be implemented by inverting the inputs of an n-input AND gate based on a secret [6], [17].”