CACTI-P: Architecture-level modeling for SRAM-based structures with advanced leakage reduction techniques

By Sheng Li, Ke Chen, Jung Ho Ahn, J. Brockman, N. Jouppi. 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2011

298 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/9680c105548e5d90a1ecd2e0df0548bde2fb5189

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Electrical and Electronic Engineering

1. Christos Kozyrakis
2. Mark A. Horowitz
3. Jing Pu
4. Mingyu Gao
5. Xuan S. Yang
6. Joel S. Emer

In Hardware and Architecture

1. Mark A. Horowitz
2. Christos Kozyrakis

Citations in the corpus

• TETRIS: Scalable and Efficient Neural Network Acceleration with 3D Memory (2017, methodology): “The area and power of the register files and the global buffers at different capacities are modeled using CACTI-P [29] that has improved leakage power models over previous versions.”